8063396bf3
This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible. $ ./scripts/codeconverter/converter.py -i \ --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200916182519.415636-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
78 lines
2.4 KiB
C
78 lines
2.4 KiB
C
/*
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* STM32F2XX USART
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*
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* Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_STM32F2XX_USART_H
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#define HW_STM32F2XX_USART_H
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#include "hw/sysbus.h"
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#include "chardev/char-fe.h"
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#include "qom/object.h"
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#define USART_SR 0x00
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#define USART_DR 0x04
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#define USART_BRR 0x08
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#define USART_CR1 0x0C
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#define USART_CR2 0x10
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#define USART_CR3 0x14
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#define USART_GTPR 0x18
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/*
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* NB: The reset value mentioned in "24.6.1 Status register" seems bogus.
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* Looking at "Table 98 USART register map and reset values", it seems it
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* should be 0xc0, and that's how real hardware behaves.
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*/
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#define USART_SR_RESET (USART_SR_TXE | USART_SR_TC)
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#define USART_SR_TXE (1 << 7)
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#define USART_SR_TC (1 << 6)
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#define USART_SR_RXNE (1 << 5)
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#define USART_CR1_UE (1 << 13)
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#define USART_CR1_RXNEIE (1 << 5)
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#define USART_CR1_TE (1 << 3)
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#define USART_CR1_RE (1 << 2)
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#define TYPE_STM32F2XX_USART "stm32f2xx-usart"
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OBJECT_DECLARE_SIMPLE_TYPE(STM32F2XXUsartState, STM32F2XX_USART)
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struct STM32F2XXUsartState {
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/* <private> */
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SysBusDevice parent_obj;
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/* <public> */
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MemoryRegion mmio;
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uint32_t usart_sr;
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uint32_t usart_dr;
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uint32_t usart_brr;
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uint32_t usart_cr1;
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uint32_t usart_cr2;
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uint32_t usart_cr3;
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uint32_t usart_gtpr;
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CharBackend chr;
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qemu_irq irq;
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};
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#endif /* HW_STM32F2XX_USART_H */
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