* rust: interior mutability types * rust: add a bit operations module * rust: first part of QOM rework * kvm: remove unnecessary #ifdef * clock: small cleanups, improve handling of Clock lifetimes -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmdZqFkUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroOzRwf/SYUD+CJCn2x7kUH/JG893jwN1WbJ meGZ0PQDUpOZJFWg6T4g0MuW4O+Wevy2pF4SfGojgqaYxKBbTQVkeliDEMyNUxpr vSKXego0K3pkX3cRDXNVTaXFbsHsMt/3pfzMQM6ocF9qbL+Emvx7Og6WdAcyJ4hc lA17EHlnrWKUSnqN/Ow/pZXsa4ijCklXFFh4barfbdGVhMQc2QekUU45GsP2AvGT NkXTQC05HqxBaAIDeSxbprDSzNihyT71dAooVoxqKboprPu5uoUSJwgaD8rADPr4 EOfsz61V4mji+DWDcIzTtYoAdY41vVXI9lvCKOcCFkimA29xO0W6P7mG2w== =JSh5 -----END PGP SIGNATURE----- Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging * rust: better integration with clippy, rustfmt and rustdoc * rust: interior mutability types * rust: add a bit operations module * rust: first part of QOM rework * kvm: remove unnecessary #ifdef * clock: small cleanups, improve handling of Clock lifetimes # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmdZqFkUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroOzRwf/SYUD+CJCn2x7kUH/JG893jwN1WbJ # meGZ0PQDUpOZJFWg6T4g0MuW4O+Wevy2pF4SfGojgqaYxKBbTQVkeliDEMyNUxpr # vSKXego0K3pkX3cRDXNVTaXFbsHsMt/3pfzMQM6ocF9qbL+Emvx7Og6WdAcyJ4hc # lA17EHlnrWKUSnqN/Ow/pZXsa4ijCklXFFh4barfbdGVhMQc2QekUU45GsP2AvGT # NkXTQC05HqxBaAIDeSxbprDSzNihyT71dAooVoxqKboprPu5uoUSJwgaD8rADPr4 # EOfsz61V4mji+DWDcIzTtYoAdY41vVXI9lvCKOcCFkimA29xO0W6P7mG2w== # =JSh5 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 11 Dec 2024 09:57:29 EST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (49 commits) rust: qom: change the parent type to an associated type rust: qom: split ObjectType from ObjectImpl trait rust: qom: move bridge for TypeInfo functions out of pl011 rust: qdev: move bridge for realize and reset functions out of pl011 rust: qdev: move device_class_init! body to generic function, ClassInitImpl implementation to macro rust: qom: move ClassInitImpl to the instance side rust: qom: convert type_info! macro to an associated const rust: qom: rename Class trait to ClassInitImpl rust: qom: add default definitions for ObjectImpl rust: add a bit operation module rust: add bindings for interrupt sources rust: define prelude rust: cell: add BQL-enforcing RefCell variant rust: cell: add BQL-enforcing Cell variant bql: check that the BQL is not dropped within marked sections qom/object: Remove type_register() script/codeconverter/qom_type_info: Deprecate MakeTypeRegisterStatic and MakeTypeRegisterNotStatic ui: Replace type_register() with type_register_static() target/xtensa: Replace type_register() with type_register_static() target/sparc: Replace type_register() with type_register_static() ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
		
			
				
	
	
		
			357 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			357 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
#ifndef HW_PC_H
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#define HW_PC_H
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#include "qemu/notify.h"
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#include "qapi/qapi-types-common.h"
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#include "qemu/uuid.h"
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#include "hw/boards.h"
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#include "hw/block/fdc.h"
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#include "hw/block/flash.h"
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#include "hw/i386/x86.h"
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#include "hw/hotplug.h"
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#include "qom/object.h"
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#include "hw/i386/sgx-epc.h"
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#include "hw/cxl/cxl.h"
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#define MAX_IDE_BUS 2
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/**
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 * PCMachineState:
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 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
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 * @boot_cpus: number of present VCPUs
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 */
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typedef struct PCMachineState {
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    /*< private >*/
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    X86MachineState parent_obj;
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    /* <public> */
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    /* State for other subsystems/APIs: */
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    Notifier machine_done;
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    /* Pointers to devices and objects: */
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    PCIBus *pcibus;
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    I2CBus *smbus;
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    PFlashCFI01 *flash[2];
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    ISADevice *pcspk;
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    DeviceState *iommu;
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    BusState *idebus[MAX_IDE_BUS];
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    /* Configuration options: */
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    uint64_t max_ram_below_4g;
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    OnOffAuto vmport;
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    SmbiosEntryPointType smbios_entry_point_type;
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    const char *south_bridge;
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    bool acpi_build_enabled;
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    bool smbus_enabled;
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    bool sata_enabled;
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    bool hpet_enabled;
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    bool i8042_enabled;
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    bool default_bus_bypass_iommu;
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    bool fd_bootchk;
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    uint64_t max_fw_size;
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    /* ACPI Memory hotplug IO base address */
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    hwaddr memhp_io_base;
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    SGXEPCState sgx_epc;
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    CXLState cxl_devices_state;
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} PCMachineState;
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#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
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#define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
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#define PC_MACHINE_VMPORT           "vmport"
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#define PC_MACHINE_SMBUS            "smbus"
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#define PC_MACHINE_SATA             "sata"
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#define PC_MACHINE_I8042            "i8042"
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#define PC_MACHINE_MAX_FW_SIZE      "max-fw-size"
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#define PC_MACHINE_SMBIOS_EP        "smbios-entry-point-type"
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/**
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 * PCMachineClass:
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 *
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 * Compat fields:
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 *
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 * @gigabyte_align: Make sure that guest addresses aligned at
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 *                  1Gbyte boundaries get mapped to host
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 *                  addresses aligned at 1Gbyte boundaries. This
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 *                  way we can use 1GByte pages in the host.
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 *
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 */
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struct PCMachineClass {
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    /*< private >*/
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    X86MachineClass parent_class;
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    /*< public >*/
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    /* Device configuration: */
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    bool pci_enabled;
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    const char *default_south_bridge;
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    /* Compat options: */
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    /* Default CPU model version.  See x86_cpu_set_default_version(). */
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    int default_cpu_version;
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    /* ACPI compat: */
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    bool has_acpi_build;
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    int pci_root_uid;
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    /* SMBIOS compat: */
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    bool smbios_defaults;
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    bool smbios_legacy_mode;
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    SmbiosEntryPointType default_smbios_ep_type;
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    /* RAM / address space compat: */
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    bool gigabyte_align;
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    bool has_reserved_memory;
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    bool broken_reserved_end;
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    bool enforce_amd_1tb_hole;
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    bool isa_bios_alias;
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    /* generate legacy CPU hotplug AML */
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    bool legacy_cpu_hotplug;
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    /* use PVH to load kernels that support this feature */
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    bool pvh_enabled;
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    /* create kvmclock device even when KVM PV features are not exposed */
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    bool kvmclock_create_always;
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    /*
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     * whether the machine type implements broken 32-bit address space bound
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     * check for memory.
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     */
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    bool broken_32bit_mem_addr_check;
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};
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#define TYPE_PC_MACHINE "generic-pc-machine"
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OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE)
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/* ioapic.c */
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GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
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/* pc.c */
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void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
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#define PCI_HOST_PROP_RAM_MEM          "ram-mem"
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#define PCI_HOST_PROP_PCI_MEM          "pci-mem"
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#define PCI_HOST_PROP_SYSTEM_MEM       "system-mem"
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#define PCI_HOST_PROP_IO_MEM           "io-mem"
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#define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
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#define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
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#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
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#define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
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#define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
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#define PCI_HOST_BELOW_4G_MEM_SIZE     "below-4g-mem-size"
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#define PCI_HOST_ABOVE_4G_MEM_SIZE     "above-4g-mem-size"
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#define PCI_HOST_PROP_SMM_RANGES       "smm-ranges"
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typedef enum {
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    SEV_DESC_TYPE_UNDEF,
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    /* The section contains the region that must be validated by the VMM. */
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    SEV_DESC_TYPE_SNP_SEC_MEM,
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    /* The section contains the SNP secrets page */
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    SEV_DESC_TYPE_SNP_SECRETS,
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    /* The section contains address that can be used as a CPUID page */
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    SEV_DESC_TYPE_CPUID,
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    /* The section contains the region for kernel hashes for measured direct boot */
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    SEV_DESC_TYPE_SNP_KERNEL_HASHES = 0x10,
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} ovmf_sev_metadata_desc_type;
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typedef struct __attribute__((__packed__)) OvmfSevMetadataDesc {
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    uint32_t base;
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    uint32_t len;
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    ovmf_sev_metadata_desc_type type;
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} OvmfSevMetadataDesc;
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typedef struct __attribute__((__packed__)) OvmfSevMetadata {
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    uint8_t signature[4];
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    uint32_t len;
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    uint32_t version;
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    uint32_t num_desc;
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    OvmfSevMetadataDesc descs[];
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} OvmfSevMetadata;
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OvmfSevMetadata *pc_system_get_ovmf_sev_metadata_ptr(void);
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void pc_pci_as_mapping_init(MemoryRegion *system_memory,
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                            MemoryRegion *pci_address_space);
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void xen_load_linux(PCMachineState *pcms);
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void pc_memory_init(PCMachineState *pcms,
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                    MemoryRegion *system_memory,
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                    MemoryRegion *rom_memory,
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                    uint64_t pci_hole64_size);
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uint64_t pc_pci_hole64_start(void);
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DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
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void pc_basic_device_init(struct PCMachineState *pcms,
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                          ISABus *isa_bus, qemu_irq *gsi,
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                          ISADevice *rtc_state,
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                          bool create_fdctrl,
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                          uint32_t hpet_irqs);
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void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
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void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
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/* port92.c */
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#define PORT92_A20_LINE "a20"
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#define TYPE_PORT92 "port92"
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/* pc_sysfw.c */
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void pc_system_flash_create(PCMachineState *pcms);
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void pc_system_flash_cleanup_unused(PCMachineState *pcms);
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void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
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bool pc_system_ovmf_table_find(const char *entry, uint8_t **data,
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                               int *data_len);
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void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size);
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/* sgx.c */
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void pc_machine_init_sgx_epc(PCMachineState *pcms);
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extern GlobalProperty pc_compat_9_2[];
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extern const size_t pc_compat_9_2_len;
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extern GlobalProperty pc_compat_9_1[];
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extern const size_t pc_compat_9_1_len;
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extern GlobalProperty pc_compat_9_0[];
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extern const size_t pc_compat_9_0_len;
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extern GlobalProperty pc_compat_8_2[];
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extern const size_t pc_compat_8_2_len;
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extern GlobalProperty pc_compat_8_1[];
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extern const size_t pc_compat_8_1_len;
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extern GlobalProperty pc_compat_8_0[];
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extern const size_t pc_compat_8_0_len;
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extern GlobalProperty pc_compat_7_2[];
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extern const size_t pc_compat_7_2_len;
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extern GlobalProperty pc_compat_7_1[];
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extern const size_t pc_compat_7_1_len;
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extern GlobalProperty pc_compat_7_0[];
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extern const size_t pc_compat_7_0_len;
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extern GlobalProperty pc_compat_6_2[];
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extern const size_t pc_compat_6_2_len;
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extern GlobalProperty pc_compat_6_1[];
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extern const size_t pc_compat_6_1_len;
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extern GlobalProperty pc_compat_6_0[];
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extern const size_t pc_compat_6_0_len;
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extern GlobalProperty pc_compat_5_2[];
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extern const size_t pc_compat_5_2_len;
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extern GlobalProperty pc_compat_5_1[];
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extern const size_t pc_compat_5_1_len;
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extern GlobalProperty pc_compat_5_0[];
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extern const size_t pc_compat_5_0_len;
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extern GlobalProperty pc_compat_4_2[];
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extern const size_t pc_compat_4_2_len;
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extern GlobalProperty pc_compat_4_1[];
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extern const size_t pc_compat_4_1_len;
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extern GlobalProperty pc_compat_4_0[];
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extern const size_t pc_compat_4_0_len;
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extern GlobalProperty pc_compat_3_1[];
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extern const size_t pc_compat_3_1_len;
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extern GlobalProperty pc_compat_3_0[];
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extern const size_t pc_compat_3_0_len;
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extern GlobalProperty pc_compat_2_12[];
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extern const size_t pc_compat_2_12_len;
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extern GlobalProperty pc_compat_2_11[];
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extern const size_t pc_compat_2_11_len;
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extern GlobalProperty pc_compat_2_10[];
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extern const size_t pc_compat_2_10_len;
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extern GlobalProperty pc_compat_2_9[];
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extern const size_t pc_compat_2_9_len;
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extern GlobalProperty pc_compat_2_8[];
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extern const size_t pc_compat_2_8_len;
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extern GlobalProperty pc_compat_2_7[];
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extern const size_t pc_compat_2_7_len;
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extern GlobalProperty pc_compat_2_6[];
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extern const size_t pc_compat_2_6_len;
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extern GlobalProperty pc_compat_2_5[];
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extern const size_t pc_compat_2_5_len;
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extern GlobalProperty pc_compat_2_4[];
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extern const size_t pc_compat_2_4_len;
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extern GlobalProperty pc_compat_2_3[];
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extern const size_t pc_compat_2_3_len;
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#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
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    static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
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    { \
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        MachineClass *mc = MACHINE_CLASS(oc); \
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        optsfn(mc); \
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        mc->init = initfn; \
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    } \
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    static const TypeInfo pc_machine_type_##suffix = { \
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        .name       = namestr TYPE_MACHINE_SUFFIX, \
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        .parent     = TYPE_PC_MACHINE, \
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        .class_init = pc_machine_##suffix##_class_init, \
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    }; \
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    static void pc_machine_init_##suffix(void) \
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    { \
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        type_register_static(&pc_machine_type_##suffix); \
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    } \
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    type_init(pc_machine_init_##suffix)
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#define DEFINE_PC_VER_MACHINE(namesym, namestr, initfn, isdefault, malias, ...) \
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    static void MACHINE_VER_SYM(init, namesym, __VA_ARGS__)( \
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        MachineState *machine) \
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    { \
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        initfn(machine); \
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    } \
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    static void MACHINE_VER_SYM(class_init, namesym, __VA_ARGS__)( \
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        ObjectClass *oc, \
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        void *data) \
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    { \
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        MachineClass *mc = MACHINE_CLASS(oc); \
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        MACHINE_VER_SYM(options, namesym, __VA_ARGS__)(mc); \
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        mc->init = MACHINE_VER_SYM(init, namesym, __VA_ARGS__); \
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        MACHINE_VER_DEPRECATION(__VA_ARGS__); \
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        mc->is_default = isdefault; \
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        mc->alias = malias; \
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    } \
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    static const TypeInfo MACHINE_VER_SYM(info, namesym, __VA_ARGS__) = \
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    { \
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        .name       = MACHINE_VER_TYPE_NAME(namestr, __VA_ARGS__), \
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        .parent     = TYPE_PC_MACHINE, \
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        .class_init = MACHINE_VER_SYM(class_init, namesym, __VA_ARGS__), \
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    }; \
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    static void MACHINE_VER_SYM(register, namesym, __VA_ARGS__)(void) \
 | 
						|
    { \
 | 
						|
        MACHINE_VER_DELETION(__VA_ARGS__); \
 | 
						|
        type_register_static(&MACHINE_VER_SYM(info, namesym, __VA_ARGS__)); \
 | 
						|
    } \
 | 
						|
    type_init(MACHINE_VER_SYM(register, namesym, __VA_ARGS__));
 | 
						|
 | 
						|
#endif
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