 65cb7129f4
			
		
	
	
		65cb7129f4
		
	
	
	
	
		
			
			- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander)
 - Add '-d invalid_mem' logging option (Zoltan)
 - Create QOM containers explicitly (Peter)
 - Rename sysemu/ -> system/ (Philippe)
 - Re-orderning of include/exec/ headers (Philippe)
   Move a lot of declarations from these legacy mixed bag headers:
     . "exec/cpu-all.h"
     . "exec/cpu-common.h"
     . "exec/cpu-defs.h"
     . "exec/exec-all.h"
     . "exec/translate-all"
   to these more specific ones:
     . "exec/page-protection.h"
     . "exec/translation-block.h"
     . "user/cpu_loop.h"
     . "user/guest-host.h"
     . "user/page-protection.h"
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Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging
Accel & Exec patch queue
- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander)
- Add '-d invalid_mem' logging option (Zoltan)
- Create QOM containers explicitly (Peter)
- Rename sysemu/ -> system/ (Philippe)
- Re-orderning of include/exec/ headers (Philippe)
  Move a lot of declarations from these legacy mixed bag headers:
    . "exec/cpu-all.h"
    . "exec/cpu-common.h"
    . "exec/cpu-defs.h"
    . "exec/exec-all.h"
    . "exec/translate-all"
  to these more specific ones:
    . "exec/page-protection.h"
    . "exec/translation-block.h"
    . "user/cpu_loop.h"
    . "user/guest-host.h"
    . "user/page-protection.h"
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 # gpg: Signature made Fri 20 Dec 2024 11:45:20 EST
 # gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
 # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown]
 # gpg: WARNING: This key is not certified with a trusted signature!
 # gpg:          There is no indication that the signature belongs to the owner.
 # Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE
* tag 'exec-20241220' of https://github.com/philmd/qemu: (59 commits)
  util/qemu-timer: fix indentation
  meson: Do not define CONFIG_DEVICES on user emulation
  system/accel-ops: Remove unnecessary 'exec/cpu-common.h' header
  system/numa: Remove unnecessary 'exec/cpu-common.h' header
  hw/xen: Remove unnecessary 'exec/cpu-common.h' header
  target/mips: Drop left-over comment about Jazz machine
  target/mips: Remove tswap() calls in semihosting uhi_fstat_cb()
  target/xtensa: Remove tswap() calls in semihosting simcall() helper
  accel/tcg: Un-inline translator_is_same_page()
  accel/tcg: Include missing 'exec/translation-block.h' header
  accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h'
  accel/tcg: Restrict curr_cflags() declaration to 'internal-common.h'
  qemu/coroutine: Include missing 'qemu/atomic.h' header
  exec/translation-block: Include missing 'qemu/atomic.h' header
  accel/tcg: Declare cpu_loop_exit_requested() in 'exec/cpu-common.h'
  exec/cpu-all: Include 'cpu.h' earlier so MMU_USER_IDX is always defined
  target/sparc: Move sparc_restore_state_to_opc() to cpu.c
  target/sparc: Uninline cpu_get_tb_cpu_state()
  target/loongarch: Declare loongarch_cpu_dump_state() locally
  user: Move various declarations out of 'exec/exec-all.h'
  ...
Conflicts:
	hw/char/riscv_htif.c
	hw/intc/riscv_aplic.c
	target/s390x/cpu.c
	Apply sysemu header path changes to not in the pull request.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
		
	
			
		
			
				
	
	
		
			298 lines
		
	
	
		
			8.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			298 lines
		
	
	
		
			8.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * QEMU model of the EFUSE eFuse
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|  *
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|  * Copyright (c) 2015 Xilinx Inc.
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|  *
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|  * Written by Edgar E. Iglesias <edgari@xilinx.com>
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|  *
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|  * Permission is hereby granted, free of charge, to any person obtaining a copy
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|  * of this software and associated documentation files (the "Software"), to deal
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|  * in the Software without restriction, including without limitation the rights
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|  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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|  * copies of the Software, and to permit persons to whom the Software is
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|  * furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice shall be included in
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|  * all copies or substantial portions of the Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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|  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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|  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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|  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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|  * THE SOFTWARE.
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|  */
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| 
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| #include "qemu/osdep.h"
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| #include "hw/nvram/xlnx-efuse.h"
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| 
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| #include "qemu/error-report.h"
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| #include "qemu/log.h"
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| #include "qapi/error.h"
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| #include "system/blockdev.h"
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| #include "hw/qdev-properties.h"
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| #include "hw/qdev-properties-system.h"
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| 
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| #define TBIT0_OFFSET     28
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| #define TBIT1_OFFSET     29
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| #define TBIT2_OFFSET     30
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| #define TBIT3_OFFSET     31
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| #define TBITS_PATTERN    (0x0AU << TBIT0_OFFSET)
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| #define TBITS_MASK       (0x0FU << TBIT0_OFFSET)
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| 
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| bool xlnx_efuse_get_bit(XlnxEFuse *s, unsigned int bit)
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| {
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|     bool b = s->fuse32[bit / 32] & (1 << (bit % 32));
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|     return b;
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| }
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| 
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| static int efuse_bytes(XlnxEFuse *s)
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| {
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|     return ROUND_UP((s->efuse_nr * s->efuse_size) / 8, 4);
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| }
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| 
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| static int efuse_bdrv_read(XlnxEFuse *s, Error **errp)
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| {
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|     uint32_t *ram = s->fuse32;
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|     int nr = efuse_bytes(s);
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| 
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|     if (!s->blk) {
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|         return 0;
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|     }
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| 
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|     s->blk_ro = !blk_supports_write_perm(s->blk);
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|     if (!s->blk_ro) {
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|         int rc;
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| 
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|         rc = blk_set_perm(s->blk,
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|                           (BLK_PERM_CONSISTENT_READ | BLK_PERM_WRITE),
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|                           BLK_PERM_ALL, NULL);
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|         if (rc) {
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|             s->blk_ro = true;
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|         }
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|     }
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|     if (s->blk_ro) {
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|         warn_report("%s: Skip saving updates to read-only eFUSE backstore.",
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|                     blk_name(s->blk));
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|     }
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| 
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|     if (blk_pread(s->blk, 0, nr, ram, 0) < 0) {
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|         error_setg(errp, "%s: Failed to read %u bytes from eFUSE backstore.",
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|                    blk_name(s->blk), nr);
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|         return -1;
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|     }
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| 
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|     /* Convert from little-endian backstore for each 32-bit row */
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|     nr /= 4;
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|     while (nr--) {
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|         ram[nr] = le32_to_cpu(ram[nr]);
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|     }
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| 
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|     return 0;
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| }
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| 
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| static void efuse_bdrv_sync(XlnxEFuse *s, unsigned int bit)
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| {
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|     unsigned int row_offset;
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|     uint32_t le32;
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| 
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|     if (!s->blk || s->blk_ro) {
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|         return;  /* Silent on read-only backend to avoid message flood */
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|     }
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| 
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|     /* Backstore is always in little-endian */
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|     le32 = cpu_to_le32(xlnx_efuse_get_row(s, bit));
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| 
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|     row_offset = (bit / 32) * 4;
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|     if (blk_pwrite(s->blk, row_offset, 4, &le32, 0) < 0) {
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|         error_report("%s: Failed to write offset %u of eFUSE backstore.",
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|                      blk_name(s->blk), row_offset);
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|     }
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| }
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| 
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| static int efuse_ro_bits_cmp(const void *a, const void *b)
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| {
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|     uint32_t i = *(const uint32_t *)a;
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|     uint32_t j = *(const uint32_t *)b;
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| 
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|     return (i > j) - (i < j);
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| }
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| 
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| static void efuse_ro_bits_sort(XlnxEFuse *s)
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| {
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|     uint32_t *ary = s->ro_bits;
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|     const uint32_t cnt = s->ro_bits_cnt;
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| 
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|     if (ary && cnt > 1) {
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|         qsort(ary, cnt, sizeof(ary[0]), efuse_ro_bits_cmp);
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|     }
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| }
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| 
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| static bool efuse_ro_bits_find(XlnxEFuse *s, uint32_t k)
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| {
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|     const uint32_t *ary = s->ro_bits;
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|     const uint32_t cnt = s->ro_bits_cnt;
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| 
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|     if (!ary || !cnt) {
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|         return false;
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|     }
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| 
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|     return bsearch(&k, ary, cnt, sizeof(ary[0]), efuse_ro_bits_cmp) != NULL;
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| }
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| 
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| bool xlnx_efuse_set_bit(XlnxEFuse *s, unsigned int bit)
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| {
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|     uint32_t set, *row;
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| 
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|     if (efuse_ro_bits_find(s, bit)) {
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|         g_autofree char *path = object_get_canonical_path(OBJECT(s));
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| 
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|         qemu_log_mask(LOG_GUEST_ERROR, "%s: WARN: "
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|                       "Ignored setting of readonly efuse bit<%u,%u>!\n",
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|                       path, (bit / 32), (bit % 32));
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|         return false;
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|     }
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| 
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|     /* Avoid back-end write unless there is a real update */
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|     row = &s->fuse32[bit / 32];
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|     set = 1 << (bit % 32);
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|     if (!(set & *row)) {
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|         *row |= set;
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|         efuse_bdrv_sync(s, bit);
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|     }
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|     return true;
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| }
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| 
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| bool xlnx_efuse_k256_check(XlnxEFuse *s, uint32_t crc, unsigned start)
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| {
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|     uint32_t calc;
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| 
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|     /* A key always occupies multiple of whole rows */
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|     assert((start % 32) == 0);
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| 
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|     calc = xlnx_efuse_calc_crc(&s->fuse32[start / 32], (256 / 32), 0);
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|     return calc == crc;
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| }
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| 
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| uint32_t xlnx_efuse_tbits_check(XlnxEFuse *s)
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| {
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|     int nr;
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|     uint32_t check = 0;
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| 
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|     for (nr = s->efuse_nr; nr-- > 0; ) {
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|         int efuse_start_row_num = (s->efuse_size * nr) / 32;
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|         uint32_t data = s->fuse32[efuse_start_row_num];
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| 
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|         /*
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|          * If the option is on, auto-init blank T-bits.
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|          * (non-blank will still be reported as '0' in the check, e.g.,
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|          *  for error-injection tests)
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|          */
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|         if ((data & TBITS_MASK) == 0 && s->init_tbits) {
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|             data |= TBITS_PATTERN;
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| 
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|             s->fuse32[efuse_start_row_num] = data;
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|             efuse_bdrv_sync(s, (efuse_start_row_num * 32 + TBIT0_OFFSET));
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|         }
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| 
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|         check = (check << 1) | ((data & TBITS_MASK) == TBITS_PATTERN);
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|     }
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| 
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|     return check;
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| }
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| 
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| static void efuse_realize(DeviceState *dev, Error **errp)
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| {
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|     XlnxEFuse *s = XLNX_EFUSE(dev);
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| 
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|     /* Sort readonly-list for bsearch lookup */
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|     efuse_ro_bits_sort(s);
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| 
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|     if ((s->efuse_size % 32) != 0) {
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|         g_autofree char *path = object_get_canonical_path(OBJECT(s));
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| 
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|         error_setg(errp,
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|                    "%s.efuse-size: %u: property value not multiple of 32.",
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|                    path, s->efuse_size);
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|         return;
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|     }
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| 
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|     s->fuse32 = g_malloc0(efuse_bytes(s));
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|     if (efuse_bdrv_read(s, errp)) {
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|         g_free(s->fuse32);
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|     }
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| }
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| 
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| static void efuse_finalize(Object *obj)
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| {
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|     XlnxEFuse *s = XLNX_EFUSE(obj);
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| 
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|     g_free(s->ro_bits);
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| }
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| 
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| static void efuse_prop_set_drive(Object *obj, Visitor *v, const char *name,
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|                                  void *opaque, Error **errp)
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| {
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|     DeviceState *dev = DEVICE(obj);
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| 
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|     qdev_prop_drive.set(obj, v, name, opaque, errp);
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| 
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|     /* Fill initial data if backend is attached after realized */
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|     if (dev->realized) {
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|         efuse_bdrv_read(XLNX_EFUSE(obj), errp);
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|     }
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| }
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| 
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| static void efuse_prop_get_drive(Object *obj, Visitor *v, const char *name,
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|                                  void *opaque, Error **errp)
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| {
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|     qdev_prop_drive.get(obj, v, name, opaque, errp);
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| }
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| 
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| static void efuse_prop_release_drive(Object *obj, const char *name,
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|                                      void *opaque)
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| {
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|     qdev_prop_drive.release(obj, name, opaque);
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| }
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| 
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| static const PropertyInfo efuse_prop_drive = {
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|     .name  = "str",
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|     .description = "Node name or ID of a block device to use as eFUSE backend",
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|     .realized_set_allowed = true,
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|     .get = efuse_prop_get_drive,
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|     .set = efuse_prop_set_drive,
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|     .release = efuse_prop_release_drive,
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| };
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| 
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| static const Property efuse_properties[] = {
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|     DEFINE_PROP("drive", XlnxEFuse, blk, efuse_prop_drive, BlockBackend *),
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|     DEFINE_PROP_UINT8("efuse-nr", XlnxEFuse, efuse_nr, 3),
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|     DEFINE_PROP_UINT32("efuse-size", XlnxEFuse, efuse_size, 64 * 32),
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|     DEFINE_PROP_BOOL("init-factory-tbits", XlnxEFuse, init_tbits, true),
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|     DEFINE_PROP_ARRAY("read-only", XlnxEFuse, ro_bits_cnt, ro_bits,
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|                       qdev_prop_uint32, uint32_t),
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| };
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| 
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| static void efuse_class_init(ObjectClass *klass, void *data)
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| {
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|     DeviceClass *dc = DEVICE_CLASS(klass);
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| 
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|     dc->realize = efuse_realize;
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|     device_class_set_props(dc, efuse_properties);
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| }
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| 
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| static const TypeInfo efuse_info = {
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|     .name          = TYPE_XLNX_EFUSE,
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|     .parent        = TYPE_DEVICE,
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|     .instance_size = sizeof(XlnxEFuse),
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|     .instance_finalize = efuse_finalize,
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|     .class_init    = efuse_class_init,
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| };
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| 
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| static void efuse_register_types(void)
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| {
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|     type_register_static(&efuse_info);
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| }
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| type_init(efuse_register_types)
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