32cad1ffb8
Headers in include/sysemu/ are not only related to system *emulation*, they are also used by virtualization. Rename as system/ which is clearer. Files renamed manually then mechanical change using sed tool. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Lei Yang <leiyang@redhat.com> Message-Id: <20241203172445.28576-1-philmd@linaro.org>
125 lines
3.4 KiB
C
125 lines
3.4 KiB
C
/*
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* QEMU Xen PVH x86 Machine
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*
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* Copyright (c) 2024 Advanced Micro Devices, Inc.
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* Written by Edgar E. Iglesias <edgar.iglesias@amd.com>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "qemu/error-report.h"
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#include "hw/boards.h"
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#include "system/system.h"
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#include "hw/xen/arch_hvm.h"
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#include <xen/hvm/hvm_info_table.h>
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#include "hw/xen/xen-pvh-common.h"
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#define TYPE_XEN_PVH_X86 MACHINE_TYPE_NAME("xenpvh")
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OBJECT_DECLARE_SIMPLE_TYPE(XenPVHx86State, XEN_PVH_X86)
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struct XenPVHx86State {
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/*< private >*/
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XenPVHMachineState parent;
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DeviceState **cpu;
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};
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static DeviceState *xen_pvh_cpu_new(MachineState *ms,
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int64_t apic_id)
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{
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Object *cpu = object_new(ms->cpu_type);
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object_property_add_child(OBJECT(ms), "cpu[*]", cpu);
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object_property_set_uint(cpu, "apic-id", apic_id, &error_fatal);
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qdev_realize(DEVICE(cpu), NULL, &error_fatal);
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object_unref(cpu);
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return DEVICE(cpu);
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}
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static void xen_pvh_init(MachineState *ms)
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{
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XenPVHx86State *xp = XEN_PVH_X86(ms);
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int i;
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/* Create dummy cores. This will indirectly create the APIC MSI window. */
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xp->cpu = g_malloc(sizeof xp->cpu[0] * ms->smp.max_cpus);
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for (i = 0; i < ms->smp.max_cpus; i++) {
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xp->cpu[i] = xen_pvh_cpu_new(ms, i);
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}
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}
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static void xen_pvh_instance_init(Object *obj)
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{
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XenPVHMachineState *s = XEN_PVH_MACHINE(obj);
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/* Default values. */
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s->cfg.ram_low = (MemMapEntry) { 0x0, 0x80000000U };
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s->cfg.ram_high = (MemMapEntry) { 0xC000000000ULL, 0x4000000000ULL };
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s->cfg.pci_intx_irq_base = 16;
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}
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/*
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* Deliver INTX interrupts to Xen guest.
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*/
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static void xen_pvh_set_pci_intx_irq(void *opaque, int irq, int level)
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{
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/*
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* Since QEMU emulates all of the swizziling
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* We don't want Xen to do any additional swizzling in
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* xen_set_pci_intx_level() so we always set device to 0.
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*/
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if (xen_set_pci_intx_level(xen_domid, 0, 0, 0, irq, level)) {
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error_report("xendevicemodel_set_pci_intx_level failed");
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}
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}
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static void xen_pvh_machine_class_init(ObjectClass *oc, void *data)
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{
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XenPVHMachineClass *xpc = XEN_PVH_MACHINE_CLASS(oc);
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->desc = "Xen PVH x86 machine";
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mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
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/* mc->max_cpus holds the MAX value allowed in the -smp cmd-line opts. */
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mc->max_cpus = HVM_MAX_VCPUS;
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/* We have an implementation specific init to create CPU objects. */
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xpc->init = xen_pvh_init;
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/* Enable buffered IOREQs. */
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xpc->handle_bufioreq = HVM_IOREQSRV_BUFIOREQ_ATOMIC;
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/*
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* PCI INTX routing.
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*
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* We describe the mapping between the 4 INTX interrupt and GSIs
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* using xen_set_pci_link_route(). xen_pvh_set_pci_intx_irq is
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* used to deliver the interrupt.
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*/
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xpc->set_pci_intx_irq = xen_pvh_set_pci_intx_irq;
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xpc->set_pci_link_route = xen_set_pci_link_route;
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/* List of supported features known to work on PVH x86. */
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xpc->has_pci = true;
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xen_pvh_class_setup_common_props(xpc);
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}
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static const TypeInfo xen_pvh_x86_machine_type = {
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.name = TYPE_XEN_PVH_X86,
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.parent = TYPE_XEN_PVH_MACHINE,
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.class_init = xen_pvh_machine_class_init,
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.instance_init = xen_pvh_instance_init,
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.instance_size = sizeof(XenPVHx86State),
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};
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static void xen_pvh_machine_register_types(void)
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{
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type_register_static(&xen_pvh_x86_machine_type);
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}
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type_init(xen_pvh_machine_register_types)
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