SYS-OSS/FRET-qemu
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FRET-qemu/target
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Emmanuel Blot 6cfcf77573 target/riscv: fix a typo with interrupt names 
Interrupt names have been swapped in 205377f8 and do not follow
IRQ_*_EXT definition order.

Signed-off-by: Emmanuel Blot <emmanuel.blot@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210421133236.11323-1-emmanuel.blot@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-05-11 20:02:07 +10:00
..
alpha
target/alpha: fix icount handling for timer instructions
2021-04-05 07:32:56 -07:00
arm
target/arm: Make WFI a NOP for userspace emulators
2021-05-10 13:24:09 +01:00
avr
target/avr: Fix interrupt execution
2021-03-15 00:39:52 +01:00
cris
target/cris: Plug leakage of TCG temporaries
2021-02-22 09:04:58 +01:00
hexagon
Trivial patches pull request 20210503
2021-05-05 13:52:00 +01:00
hppa
exec: Use cpu_untagged_addr in g2h; split out g2h_untagged
2021-02-16 11:04:53 +00:00
i386
* NetBSD NVMM support
2021-05-06 18:56:17 +01:00
lm32
hw: Do not include qemu/log.h if it is not necessary
2021-05-02 17:24:50 +02:00
m68k
Prepare MacOS ROM support:
2021-03-12 18:56:56 +00:00
microblaze
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
2021-02-05 10:24:15 -10:00
mips
target/mips: Move TCG source files under tcg/ sub directory
2021-05-02 16:49:35 +02:00
moxie
exec: Move TranslationBlock typedef to qemu/typedefs.h
2021-02-18 08:19:08 +00:00
nios2
semihosting: Move include/hw/semihosting/ -> include/semihosting/
2021-03-10 15:34:12 +00:00
openrisc
Do not include sysemu/sysemu.h if it's not really necessary
2021-05-02 17:24:50 +02:00
ppc
target/ppc: removed VSCR from SPR registration
2021-05-04 13:12:59 +10:00
riscv
target/riscv: fix a typo with interrupt names
2021-05-11 20:02:07 +10:00
rx
Do not include sysemu/sysemu.h if it's not really necessary
2021-05-02 17:24:50 +02:00
s390x
Do not include exec/address-spaces.h if it's not really necessary
2021-05-02 17:24:51 +02:00
sh4
target/sh4: Remove unused definitions
2021-03-06 16:18:42 +01:00
sparc
hw/sparc*: Move cpu_check_irqs() to target/sparc/
2021-05-04 22:45:53 +01:00
tricore
target/tricore: Fix OPC2_32_RRPW_EXTR for width=0
2021-03-14 14:49:01 +01:00
unicore32
semihosting: Move include/hw/semihosting/ -> include/semihosting/
2021-03-10 15:34:12 +00:00
xtensa
Do not include exec/address-spaces.h if it's not really necessary
2021-05-02 17:24:51 +02:00
meson.build
Remove deprecated target tilegx
2021-03-09 11:26:32 +01:00