This patch makes default boot order machine specific instead of set globally. The default boot order can be set per machine in QEMUMachine boot_order. This also allows a machine to receive a NULL boot order when -boot isn't used and take an appropriate action accordingly. This helps machine boots from the devices as set in guest's non-volatile memory location in case no boot order is provided by the user. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avik Sil <aviksil@linux.vnet.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
		
			
				
	
	
		
			412 lines
		
	
	
		
			13 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			412 lines
		
	
	
		
			13 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * QEMU fulong 2e mini pc support
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 *
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 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
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 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
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 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
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 * This code is licensed under the GNU GPL v2.
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 *
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 * Contributions after 2012-01-13 are licensed under the terms of the
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 * GNU GPL, version 2 or (at your option) any later version.
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 */
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/*
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 * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
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 * http://www.linux-mips.org/wiki/Fulong
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 *
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 * Loongson 2e user manual:
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 * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
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 */
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#include "hw.h"
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#include "pc.h"
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#include "serial.h"
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#include "fdc.h"
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#include "net/net.h"
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#include "boards.h"
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#include "smbus.h"
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#include "block/block.h"
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#include "flash.h"
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#include "mips.h"
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#include "mips_cpudevs.h"
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#include "pci/pci.h"
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#include "char/char.h"
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#include "sysemu/sysemu.h"
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#include "audio/audio.h"
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#include "qemu/log.h"
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#include "loader.h"
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#include "mips-bios.h"
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#include "ide.h"
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#include "elf.h"
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#include "vt82c686.h"
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#include "mc146818rtc.h"
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#include "i8254.h"
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#include "sysemu/blockdev.h"
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#include "exec/address-spaces.h"
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#define DEBUG_FULONG2E_INIT
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#define ENVP_ADDR       0x80002000l
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#define ENVP_NB_ENTRIES	 	16
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#define ENVP_ENTRY_SIZE	 	256
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#define MAX_IDE_BUS 2
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/*
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 * PMON is not part of qemu and released with BSD license, anyone
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 * who want to build a pmon binary please first git-clone the source
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 * from the git repository at:
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 * http://www.loongson.cn/support/git/pmon
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 * Then follow the "Compile Guide" available at:
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 * http://dev.lemote.com/code/pmon
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 *
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 * Notes:
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 * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
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 * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
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 * in the "Compile Guide".
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 */
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#define FULONG_BIOSNAME "pmon_fulong2e.bin"
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/* PCI SLOT in fulong 2e */
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#define FULONG2E_VIA_SLOT        5
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#define FULONG2E_ATI_SLOT        6
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#define FULONG2E_RTL8139_SLOT    7
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static ISADevice *pit;
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static struct _loaderparams {
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    int ram_size;
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    const char *kernel_filename;
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    const char *kernel_cmdline;
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    const char *initrd_filename;
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} loaderparams;
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static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
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                                        const char *string, ...)
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{
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    va_list ap;
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    int32_t table_addr;
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    if (index >= ENVP_NB_ENTRIES)
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        return;
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    if (string == NULL) {
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        prom_buf[index] = 0;
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        return;
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    }
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    table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
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    prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
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    va_start(ap, string);
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    vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
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    va_end(ap);
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}
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static int64_t load_kernel (CPUMIPSState *env)
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{
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    int64_t kernel_entry, kernel_low, kernel_high;
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    int index = 0;
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    long initrd_size;
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    ram_addr_t initrd_offset;
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    uint32_t *prom_buf;
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    long prom_size;
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    if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL,
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                 (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low,
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                 (uint64_t *)&kernel_high, 0, ELF_MACHINE, 1) < 0) {
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        fprintf(stderr, "qemu: could not load kernel '%s'\n",
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                loaderparams.kernel_filename);
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        exit(1);
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    }
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    /* load initrd */
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    initrd_size = 0;
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    initrd_offset = 0;
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    if (loaderparams.initrd_filename) {
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        initrd_size = get_image_size (loaderparams.initrd_filename);
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        if (initrd_size > 0) {
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            initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
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            if (initrd_offset + initrd_size > ram_size) {
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                fprintf(stderr,
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                        "qemu: memory too small for initial ram disk '%s'\n",
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                        loaderparams.initrd_filename);
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                exit(1);
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            }
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            initrd_size = load_image_targphys(loaderparams.initrd_filename,
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                                     initrd_offset, ram_size - initrd_offset);
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        }
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        if (initrd_size == (target_ulong) -1) {
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            fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
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                    loaderparams.initrd_filename);
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            exit(1);
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        }
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    }
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    /* Setup prom parameters. */
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    prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
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    prom_buf = g_malloc(prom_size);
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    prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
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    if (initrd_size > 0) {
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        prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%li %s",
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                 cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
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                 loaderparams.kernel_cmdline);
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    } else {
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        prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
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    }
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    /* Setup minimum environment variables */
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    prom_set(prom_buf, index++, "busclock=33000000");
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    prom_set(prom_buf, index++, "cpuclock=100000000");
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    prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024);
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    prom_set(prom_buf, index++, "modetty0=38400n8r");
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    prom_set(prom_buf, index++, NULL);
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    rom_add_blob_fixed("prom", prom_buf, prom_size,
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                       cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
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    return kernel_entry;
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}
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static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr)
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{
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    uint32_t *p;
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    /* Small bootloader */
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    p = (uint32_t *) base;
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    stl_raw(p++, 0x0bf00010);                                      /* j 0x1fc00040 */
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    stl_raw(p++, 0x00000000);                                      /* nop */
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    /* Second part of the bootloader */
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    p = (uint32_t *) (base + 0x040);
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    stl_raw(p++, 0x3c040000);                                      /* lui a0, 0 */
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    stl_raw(p++, 0x34840002);                                      /* ori a0, a0, 2 */
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    stl_raw(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));       /* lui a1, high(ENVP_ADDR) */
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    stl_raw(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));               /* ori a1, a0, low(ENVP_ADDR) */
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    stl_raw(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
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    stl_raw(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));         /* ori a2, a2, low(ENVP_ADDR + 8) */
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    stl_raw(p++, 0x3c070000 | (loaderparams.ram_size >> 16));      /* lui a3, high(env->ram_size) */
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    stl_raw(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));   /* ori a3, a3, low(env->ram_size) */
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    stl_raw(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));     /* lui ra, high(kernel_addr) */;
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    stl_raw(p++, 0x37ff0000 | (kernel_addr & 0xffff));             /* ori ra, ra, low(kernel_addr) */
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    stl_raw(p++, 0x03e00008);                                      /* jr ra */
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    stl_raw(p++, 0x00000000);                                      /* nop */
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}
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static void main_cpu_reset(void *opaque)
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{
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    MIPSCPU *cpu = opaque;
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    CPUMIPSState *env = &cpu->env;
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    cpu_reset(CPU(cpu));
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    /* TODO: 2E reset stuff */
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    if (loaderparams.kernel_filename) {
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        env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
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    }
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}
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uint8_t eeprom_spd[0x80] = {
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    0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,
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    0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,
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    0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,
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    0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,
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    0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,
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    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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    0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,
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    0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,
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    0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,
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    0x20,0x30,0x20
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};
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/* Audio support */
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static void audio_init (PCIBus *pci_bus)
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{
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    vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5));
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    vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6));
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}
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/* Network support */
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static void network_init (void)
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{
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    int i;
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    for(i = 0; i < nb_nics; i++) {
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        NICInfo *nd = &nd_table[i];
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        const char *default_devaddr = NULL;
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        if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
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            /* The fulong board has a RTL8139 card using PCI SLOT 7 */
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            default_devaddr = "07";
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        }
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        pci_nic_init_nofail(nd, "rtl8139", default_devaddr);
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    }
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}
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static void cpu_request_exit(void *opaque, int irq, int level)
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{
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    CPUMIPSState *env = cpu_single_env;
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    if (env && level) {
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        cpu_exit(env);
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    }
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}
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static void mips_fulong2e_init(QEMUMachineInitArgs *args)
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{
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    ram_addr_t ram_size = args->ram_size;
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    const char *cpu_model = args->cpu_model;
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    const char *kernel_filename = args->kernel_filename;
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    const char *kernel_cmdline = args->kernel_cmdline;
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    const char *initrd_filename = args->initrd_filename;
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    char *filename;
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    MemoryRegion *address_space_mem = get_system_memory();
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    MemoryRegion *ram = g_new(MemoryRegion, 1);
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    MemoryRegion *bios = g_new(MemoryRegion, 1);
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    long bios_size;
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    int64_t kernel_entry;
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    qemu_irq *i8259;
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    qemu_irq *cpu_exit_irq;
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    PCIBus *pci_bus;
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    ISABus *isa_bus;
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    i2c_bus *smbus;
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    int i;
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    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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    MIPSCPU *cpu;
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    CPUMIPSState *env;
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    /* init CPUs */
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    if (cpu_model == NULL) {
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        cpu_model = "Loongson-2E";
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    }
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    cpu = cpu_mips_init(cpu_model);
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    if (cpu == NULL) {
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        fprintf(stderr, "Unable to find CPU definition\n");
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        exit(1);
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    }
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    env = &cpu->env;
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    qemu_register_reset(main_cpu_reset, cpu);
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    /* fulong 2e has 256M ram. */
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    ram_size = 256 * 1024 * 1024;
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    /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
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    bios_size = 1024 * 1024;
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    /* allocate RAM */
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    memory_region_init_ram(ram, "fulong2e.ram", ram_size);
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    vmstate_register_ram_global(ram);
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    memory_region_init_ram(bios, "fulong2e.bios", bios_size);
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    vmstate_register_ram_global(bios);
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    memory_region_set_readonly(bios, true);
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    memory_region_add_subregion(address_space_mem, 0, ram);
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    memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
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    /* We do not support flash operation, just loading pmon.bin as raw BIOS.
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     * Please use -L to set the BIOS path and -bios to set bios name. */
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    if (kernel_filename) {
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        loaderparams.ram_size = ram_size;
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        loaderparams.kernel_filename = kernel_filename;
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        loaderparams.kernel_cmdline = kernel_cmdline;
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        loaderparams.initrd_filename = initrd_filename;
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        kernel_entry = load_kernel (env);
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        write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
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    } else {
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        if (bios_name == NULL) {
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                bios_name = FULONG_BIOSNAME;
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        }
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        filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
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        if (filename) {
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            bios_size = load_image_targphys(filename, 0x1fc00000LL,
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                                            BIOS_SIZE);
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            g_free(filename);
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        } else {
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            bios_size = -1;
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        }
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        if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
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            fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", bios_name);
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						|
            exit(1);
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        }
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    }
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						|
 | 
						|
    /* Init internal devices */
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						|
    cpu_mips_irq_init_cpu(env);
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						|
    cpu_mips_clock_init(env);
 | 
						|
 | 
						|
    /* North bridge, Bonito --> IP2 */
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						|
    pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
 | 
						|
 | 
						|
    /* South bridge */
 | 
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    ide_drive_get(hd, MAX_IDE_BUS);
 | 
						|
 | 
						|
    isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0));
 | 
						|
    if (!isa_bus) {
 | 
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        fprintf(stderr, "vt82c686b_init error\n");
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        exit(1);
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    }
 | 
						|
 | 
						|
    /* Interrupt controller */
 | 
						|
    /* The 8259 -> IP5  */
 | 
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    i8259 = i8259_init(isa_bus, env->irq[5]);
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    isa_bus_irqs(isa_bus, i8259);
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 | 
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    vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
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    pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2),
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                      "vt82c686b-usb-uhci");
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    pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3),
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                      "vt82c686b-usb-uhci");
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						|
    smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4),
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                              0xeee1, NULL);
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    /* TODO: Populate SPD eeprom data.  */
 | 
						|
    smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));
 | 
						|
 | 
						|
    /* init other devices */
 | 
						|
    pit = pit_init(isa_bus, 0x40, 0, NULL);
 | 
						|
    cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
 | 
						|
    DMA_init(0, cpu_exit_irq);
 | 
						|
 | 
						|
    /* Super I/O */
 | 
						|
    isa_create_simple(isa_bus, "i8042");
 | 
						|
 | 
						|
    rtc_init(isa_bus, 2000, NULL);
 | 
						|
 | 
						|
    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 | 
						|
        if (serial_hds[i]) {
 | 
						|
            serial_isa_init(isa_bus, i, serial_hds[i]);
 | 
						|
        }
 | 
						|
    }
 | 
						|
 | 
						|
    if (parallel_hds[0]) {
 | 
						|
        parallel_init(isa_bus, 0, parallel_hds[0]);
 | 
						|
    }
 | 
						|
 | 
						|
    /* Sound card */
 | 
						|
    audio_init(pci_bus);
 | 
						|
    /* Network card */
 | 
						|
    network_init();
 | 
						|
}
 | 
						|
 | 
						|
static QEMUMachine mips_fulong2e_machine = {
 | 
						|
    .name = "fulong2e",
 | 
						|
    .desc = "Fulong 2e mini pc",
 | 
						|
    .init = mips_fulong2e_init,
 | 
						|
    DEFAULT_MACHINE_OPTIONS,
 | 
						|
};
 | 
						|
 | 
						|
static void mips_fulong2e_machine_init(void)
 | 
						|
{
 | 
						|
    qemu_register_machine(&mips_fulong2e_machine);
 | 
						|
}
 | 
						|
 | 
						|
machine_init(mips_fulong2e_machine_init);
 |