 d90f154867
			
		
	
	
		d90f154867
		
	
	
	
	
		
			
			Here's the first ppc pull request for qemu-6.1. It has a wide variety of stuff accumulated during the 6.0 freeze. Highlights are: * Multi-phase reset cleanups for PAPR * Preliminary cleanups towards allowing !CONFIG_TCG for the ppc target * Cleanup of AIL logic and extension to POWER10 * Further improvements to handling of hot unplug failures on PAPR * Allow much larger numbers of CPU on pseries * Support for the H_SCM_HEALTH hypercall * Add support for the Pegasos II board * Substantial cleanup to hflag handling * Assorted minor fixes and cleanups -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEdfRlhq5hpmzETofcbDjKyiDZs5IFAmCQ4ScACgkQbDjKyiDZ s5KmNhAAsICdDqeu/jm1uhRCr0DDT/Wa6KE1xlglQ53ybWb5Hm2ae0Uwzti5ZWkt T9yryObX++wiugbU5Dlx9eXTiJIPgTbDoBV1wfOa3a1BAxSEES1t70jwuwAXXBpX mgU++SurQB70IB7vVvyXDi2Z592qGvMiKXqT0sdkfoexPHzAL0+KkQPyJZLeFchM Ap/zRHAodXf9SuWAl+LwLXeb350jivXYXBWNcFRrBbOGpbVT0AJMYrk/TEa2ZIpi SvbzAWuW+9mX0EOmk7JK5JfkT41cGNdcBcwd0bt4xyvUpmkXLaTMFDLVHj3HWSUn PFA4RB3uKXyTfISVtWdxJBbFOzMpchI6lEiRJHCS+KuY7UsACqV1T/y54ATOUauC ycLc9APgRaStdNPxfDl+xeFfoVb/f0mQsNwcmY1tv7z+3qE/trY9bMyrbgaebBFn /TAkmPvXfwtAREnx8xF/57poarWUkvupGTQkANNosdFokpExmrLj8T0sKv90hh5Y vkGf5zP4pYGN1Rs8qhOdHu+IjhVJvUl/L3LZYWcoMI6E61D8rGRc0Dkacx7gcja+ sluFi5Yh2fQn55y6LTi3049cB1wMd6wly0214F11RKoBswguiGuaqJmL4sNDO/s4 IcMCy5mg6C0jNZA5kHcdWmqsVzD2+XwP5J29n/LedlmgXoHYF+M= =N0qr -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210504' into staging ppc patch queue 2021-05-04 Here's the first ppc pull request for qemu-6.1. It has a wide variety of stuff accumulated during the 6.0 freeze. Highlights are: * Multi-phase reset cleanups for PAPR * Preliminary cleanups towards allowing !CONFIG_TCG for the ppc target * Cleanup of AIL logic and extension to POWER10 * Further improvements to handling of hot unplug failures on PAPR * Allow much larger numbers of CPU on pseries * Support for the H_SCM_HEALTH hypercall * Add support for the Pegasos II board * Substantial cleanup to hflag handling * Assorted minor fixes and cleanups # gpg: Signature made Tue 04 May 2021 06:52:39 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.1-20210504: (46 commits) hw/ppc/pnv_psi: Use device_cold_reset() instead of device_legacy_reset() hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset() hw/intc/spapr_xive: Use device_cold_reset() instead of device_legacy_reset() target/ppc: removed VSCR from SPR registration target/ppc: Reduce the size of ppc_spr_t target/ppc: Clean up _spr_register et al target/ppc: Add POWER10 exception model target/ppc: rework AIL logic in interrupt delivery target/ppc: move opcode table logic to translate.c target/ppc: code motion from translate_init.c.inc to gdbstub.c spapr_drc.c: handle hotunplug errors in drc_unisolate_logical() spapr.h: increase FDT_MAX_SIZE spapr.c: do not use MachineClass::max_cpus to limit CPUs ppc: Rename current DAWR macros and variables target/ppc: POWER10 supports scv target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour docs/system: ppc: Add documentation for ppce500 machine roms/u-boot: Bump ppce500 u-boot to v2021.04 to fix broken pci support roms/Makefile: Update ppce500 u-boot build directory name ppc/spapr: Add support for implement support for H_SCM_HEALTH ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
		
			
				
	
	
		
			634 lines
		
	
	
		
			20 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			634 lines
		
	
	
		
			20 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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|  *
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|  * Hypercall based emulated RTAS
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|  *
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|  * Copyright (c) 2010-2011 David Gibson, IBM Corporation.
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|  *
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|  * Permission is hereby granted, free of charge, to any person obtaining a copy
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|  * of this software and associated documentation files (the "Software"), to deal
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|  * in the Software without restriction, including without limitation the rights
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|  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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|  * copies of the Software, and to permit persons to whom the Software is
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|  * furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice shall be included in
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|  * all copies or substantial portions of the Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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|  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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|  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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|  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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|  * THE SOFTWARE.
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|  *
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|  */
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| 
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| #include "qemu/osdep.h"
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| #include "qemu/log.h"
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| #include "qemu/error-report.h"
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| #include "sysemu/sysemu.h"
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| #include "sysemu/device_tree.h"
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| #include "sysemu/cpus.h"
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| #include "sysemu/hw_accel.h"
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| #include "sysemu/runstate.h"
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| #include "kvm_ppc.h"
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| 
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| #include "hw/ppc/spapr.h"
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| #include "hw/ppc/spapr_vio.h"
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| #include "hw/ppc/spapr_rtas.h"
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| #include "hw/ppc/spapr_cpu_core.h"
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| #include "hw/ppc/ppc.h"
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| 
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| #include <libfdt.h>
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| #include "hw/ppc/spapr_drc.h"
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| #include "qemu/cutils.h"
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| #include "trace.h"
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| #include "hw/ppc/fdt.h"
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| #include "target/ppc/mmu-hash64.h"
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| #include "target/ppc/mmu-book3s-v3.h"
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| #include "migration/blocker.h"
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| #include "helper_regs.h"
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| 
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| static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr,
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|                                    uint32_t token, uint32_t nargs,
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|                                    target_ulong args,
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|                                    uint32_t nret, target_ulong rets)
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| {
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|     uint8_t c = rtas_ld(args, 0);
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|     SpaprVioDevice *sdev = vty_lookup(spapr, 0);
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| 
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|     if (!sdev) {
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|         rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
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|     } else {
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|         vty_putchars(sdev, &c, sizeof(c));
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|         rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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|     }
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| }
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| 
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| static void rtas_power_off(PowerPCCPU *cpu, SpaprMachineState *spapr,
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|                            uint32_t token, uint32_t nargs, target_ulong args,
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|                            uint32_t nret, target_ulong rets)
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| {
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|     if (nargs != 2 || nret != 1) {
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|         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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|         return;
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|     }
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|     qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
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|     cpu_stop_current();
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|     rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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| }
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| 
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| static void rtas_system_reboot(PowerPCCPU *cpu, SpaprMachineState *spapr,
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|                                uint32_t token, uint32_t nargs,
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|                                target_ulong args,
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|                                uint32_t nret, target_ulong rets)
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| {
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|     if (nargs != 0 || nret != 1) {
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|         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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|         return;
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|     }
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|     qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
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|     rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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| }
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| 
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| static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_,
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|                                          SpaprMachineState *spapr,
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|                                          uint32_t token, uint32_t nargs,
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|                                          target_ulong args,
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|                                          uint32_t nret, target_ulong rets)
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| {
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|     target_ulong id;
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|     PowerPCCPU *cpu;
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| 
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|     if (nargs != 1 || nret != 2) {
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|         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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|         return;
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|     }
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| 
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|     id = rtas_ld(args, 0);
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|     cpu = spapr_find_cpu(id);
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|     if (cpu != NULL) {
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|         if (CPU(cpu)->halted) {
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|             rtas_st(rets, 1, 0);
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|         } else {
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|             rtas_st(rets, 1, 2);
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|         }
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| 
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|         rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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|         return;
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|     }
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| 
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|     /* Didn't find a matching cpu */
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|     rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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| }
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| 
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| static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr,
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|                            uint32_t token, uint32_t nargs,
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|                            target_ulong args,
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|                            uint32_t nret, target_ulong rets)
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| {
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|     target_ulong id, start, r3;
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|     PowerPCCPU *newcpu;
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|     CPUPPCState *env;
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|     PowerPCCPUClass *pcc;
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|     target_ulong lpcr;
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| 
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|     if (nargs != 3 || nret != 1) {
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|         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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|         return;
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|     }
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| 
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|     id = rtas_ld(args, 0);
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|     start = rtas_ld(args, 1);
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|     r3 = rtas_ld(args, 2);
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| 
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|     newcpu = spapr_find_cpu(id);
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|     if (!newcpu) {
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|         /* Didn't find a matching cpu */
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|         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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|         return;
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|     }
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| 
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|     env = &newcpu->env;
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|     pcc = POWERPC_CPU_GET_CLASS(newcpu);
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| 
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|     if (!CPU(newcpu)->halted) {
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|         rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
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|         return;
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|     }
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| 
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|     cpu_synchronize_state(CPU(newcpu));
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| 
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|     env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
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|     hreg_compute_hflags(env);
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| 
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|     /* Enable Power-saving mode Exit Cause exceptions for the new CPU */
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|     lpcr = env->spr[SPR_LPCR];
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|     if (!pcc->interrupts_big_endian(callcpu)) {
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|         lpcr |= LPCR_ILE;
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|     }
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|     if (env->mmu_model == POWERPC_MMU_3_00) {
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|         /*
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|          * New cpus are expected to start in the same radix/hash mode
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|          * as the existing CPUs
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|          */
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|         if (ppc64_v3_radix(callcpu)) {
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|             lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR;
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|         } else {
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|             lpcr &= ~(LPCR_UPRT | LPCR_GTSE | LPCR_HR);
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|         }
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|         env->spr[SPR_PSSCR] &= ~PSSCR_EC;
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|     }
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|     ppc_store_lpcr(newcpu, lpcr);
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| 
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|     /*
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|      * Set the timebase offset of the new CPU to that of the invoking
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|      * CPU.  This helps hotplugged CPU to have the correct timebase
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|      * offset.
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|      */
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|     newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset;
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| 
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|     spapr_cpu_set_entry_state(newcpu, start, 0, r3, 0);
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| 
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|     qemu_cpu_kick(CPU(newcpu));
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| 
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|     rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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| }
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| 
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| static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachineState *spapr,
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|                            uint32_t token, uint32_t nargs,
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|                            target_ulong args,
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|                            uint32_t nret, target_ulong rets)
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| {
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|     CPUState *cs = CPU(cpu);
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|     CPUPPCState *env = &cpu->env;
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|     PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
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| 
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|     /* Disable Power-saving mode Exit Cause exceptions for the CPU.
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|      * This could deliver an interrupt on a dying CPU and crash the
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|      * guest.
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|      * For the same reason, set PSSCR_EC.
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|      */
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|     ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm);
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|     env->spr[SPR_PSSCR] |= PSSCR_EC;
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|     cs->halted = 1;
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|     kvmppc_set_reg_ppc_online(cpu, 0);
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|     qemu_cpu_kick(cs);
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| }
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| 
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| static void rtas_ibm_suspend_me(PowerPCCPU *cpu, SpaprMachineState *spapr,
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|                                 uint32_t token, uint32_t nargs,
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|                                 target_ulong args,
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|                                 uint32_t nret, target_ulong rets)
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| {
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|     CPUState *cs;
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| 
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|     if (nargs != 0 || nret != 1) {
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|         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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|         return;
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|     }
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| 
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|     CPU_FOREACH(cs) {
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|         PowerPCCPU *c = POWERPC_CPU(cs);
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|         CPUPPCState *e = &c->env;
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|         if (c == cpu) {
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|             continue;
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|         }
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| 
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|         /* See h_join */
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|         if (!cs->halted || (e->msr & (1ULL << MSR_EE))) {
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|             rtas_st(rets, 0, H_MULTI_THREADS_ACTIVE);
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|             return;
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|         }
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|     }
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| 
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|     qemu_system_suspend_request();
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|     rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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| }
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| 
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| static inline int sysparm_st(target_ulong addr, target_ulong len,
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|                              const void *val, uint16_t vallen)
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| {
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|     hwaddr phys = ppc64_phys_to_real(addr);
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| 
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|     if (len < 2) {
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|         return RTAS_OUT_SYSPARM_PARAM_ERROR;
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|     }
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|     stw_be_phys(&address_space_memory, phys, vallen);
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|     cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen));
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|     return RTAS_OUT_SUCCESS;
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| }
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| 
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| static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
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|                                           SpaprMachineState *spapr,
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|                                           uint32_t token, uint32_t nargs,
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|                                           target_ulong args,
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|                                           uint32_t nret, target_ulong rets)
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| {
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|     PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
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|     MachineState *ms = MACHINE(spapr);
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|     target_ulong parameter = rtas_ld(args, 0);
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|     target_ulong buffer = rtas_ld(args, 1);
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|     target_ulong length = rtas_ld(args, 2);
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|     target_ulong ret;
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| 
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|     switch (parameter) {
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|     case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: {
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|         char *param_val = g_strdup_printf("MaxEntCap=%d,"
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|                                           "DesMem=%" PRIu64 ","
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|                                           "DesProcs=%d,"
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|                                           "MaxPlatProcs=%d",
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|                                           ms->smp.max_cpus,
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|                                           ms->ram_size / MiB,
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|                                           ms->smp.cpus,
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|                                           ms->smp.max_cpus);
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|         if (pcc->n_host_threads > 0) {
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|             char *hostthr_val, *old = param_val;
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| 
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|             /*
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|              * Add HostThrs property. This property is not present in PAPR but
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|              * is expected by some guests to communicate the number of physical
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|              * host threads per core on the system so that they can scale
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|              * information which varies based on the thread configuration.
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|              */
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|             hostthr_val = g_strdup_printf(",HostThrs=%d", pcc->n_host_threads);
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|             param_val = g_strconcat(param_val, hostthr_val, NULL);
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|             g_free(hostthr_val);
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|             g_free(old);
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|         }
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|         ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
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|         g_free(param_val);
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|         break;
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|     }
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|     case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: {
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|         uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED;
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| 
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|         ret = sysparm_st(buffer, length, ¶m_val, sizeof(param_val));
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|         break;
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|     }
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|     case RTAS_SYSPARM_UUID:
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|         ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid,
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|                          (qemu_uuid_set ? 16 : 0));
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|         break;
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|     default:
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|         ret = RTAS_OUT_NOT_SUPPORTED;
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|     }
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| 
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|     rtas_st(rets, 0, ret);
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| }
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| 
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| static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu,
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|                                           SpaprMachineState *spapr,
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|                                           uint32_t token, uint32_t nargs,
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|                                           target_ulong args,
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|                                           uint32_t nret, target_ulong rets)
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| {
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|     target_ulong parameter = rtas_ld(args, 0);
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|     target_ulong ret = RTAS_OUT_NOT_SUPPORTED;
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| 
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|     switch (parameter) {
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|     case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS:
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|     case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE:
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|     case RTAS_SYSPARM_UUID:
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|         ret = RTAS_OUT_NOT_AUTHORIZED;
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|         break;
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|     }
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| 
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|     rtas_st(rets, 0, ret);
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| }
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| 
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| static void rtas_ibm_os_term(PowerPCCPU *cpu,
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|                             SpaprMachineState *spapr,
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|                             uint32_t token, uint32_t nargs,
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|                             target_ulong args,
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|                             uint32_t nret, target_ulong rets)
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| {
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|     target_ulong msgaddr = rtas_ld(args, 0);
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|     char msg[512];
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| 
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|     cpu_physical_memory_read(msgaddr, msg, sizeof(msg) - 1);
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|     msg[sizeof(msg) - 1] = 0;
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| 
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|     error_report("OS terminated: %s", msg);
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|     qemu_system_guest_panicked(NULL);
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| 
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|     rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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| }
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| 
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| static void rtas_set_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
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|                                  uint32_t token, uint32_t nargs,
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|                                  target_ulong args, uint32_t nret,
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|                                  target_ulong rets)
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| {
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|     int32_t power_domain;
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| 
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|     if (nargs != 2 || nret != 2) {
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|         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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|         return;
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|     }
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| 
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|     /* we currently only use a single, "live insert" powerdomain for
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|      * hotplugged/dlpar'd resources, so the power is always live/full (100)
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|      */
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|     power_domain = rtas_ld(args, 0);
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|     if (power_domain != -1) {
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|         rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
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|         return;
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|     }
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| 
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|     rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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|     rtas_st(rets, 1, 100);
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| }
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| 
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| static void rtas_get_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
 | |
|                                   uint32_t token, uint32_t nargs,
 | |
|                                   target_ulong args, uint32_t nret,
 | |
|                                   target_ulong rets)
 | |
| {
 | |
|     int32_t power_domain;
 | |
| 
 | |
|     if (nargs != 1 || nret != 2) {
 | |
|         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
 | |
|         return;
 | |
|     }
 | |
| 
 | |
|     /* we currently only use a single, "live insert" powerdomain for
 | |
|      * hotplugged/dlpar'd resources, so the power is always live/full (100)
 | |
|      */
 | |
|     power_domain = rtas_ld(args, 0);
 | |
|     if (power_domain != -1) {
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|         rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
 | |
|         return;
 | |
|     }
 | |
| 
 | |
|     rtas_st(rets, 0, RTAS_OUT_SUCCESS);
 | |
|     rtas_st(rets, 1, 100);
 | |
| }
 | |
| 
 | |
| static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
 | |
|                                   SpaprMachineState *spapr,
 | |
|                                   uint32_t token, uint32_t nargs,
 | |
|                                   target_ulong args,
 | |
|                                   uint32_t nret, target_ulong rets)
 | |
| {
 | |
|     hwaddr rtas_addr;
 | |
|     target_ulong sreset_addr, mce_addr;
 | |
| 
 | |
|     if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) {
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|         rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
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|         return;
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|     }
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| 
 | |
|     rtas_addr = spapr_get_rtas_addr();
 | |
|     if (!rtas_addr) {
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|         rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
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|         return;
 | |
|     }
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| 
 | |
|     sreset_addr = rtas_ld(args, 0);
 | |
|     mce_addr = rtas_ld(args, 1);
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| 
 | |
|     /* PAPR requires these are in the first 32M of memory and within RMA */
 | |
|     if (sreset_addr >= 32 * MiB || sreset_addr >= spapr->rma_size ||
 | |
|            mce_addr >= 32 * MiB ||    mce_addr >= spapr->rma_size) {
 | |
|         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
 | |
|         return;
 | |
|     }
 | |
| 
 | |
|     if (kvm_enabled()) {
 | |
|         if (kvmppc_set_fwnmi(cpu) < 0) {
 | |
|             rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
 | |
|             return;
 | |
|         }
 | |
|     }
 | |
| 
 | |
|     spapr->fwnmi_system_reset_addr = sreset_addr;
 | |
|     spapr->fwnmi_machine_check_addr = mce_addr;
 | |
| 
 | |
|     rtas_st(rets, 0, RTAS_OUT_SUCCESS);
 | |
| }
 | |
| 
 | |
| static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
 | |
|                                    SpaprMachineState *spapr,
 | |
|                                    uint32_t token, uint32_t nargs,
 | |
|                                    target_ulong args,
 | |
|                                    uint32_t nret, target_ulong rets)
 | |
| {
 | |
|     if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) {
 | |
|         rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
 | |
|         return;
 | |
|     }
 | |
| 
 | |
|     if (spapr->fwnmi_machine_check_addr == -1) {
 | |
|         qemu_log_mask(LOG_GUEST_ERROR,
 | |
| "FWNMI: ibm,nmi-interlock RTAS called with FWNMI not registered.\n");
 | |
| 
 | |
|         /* NMI register not called */
 | |
|         rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
 | |
|         return;
 | |
|     }
 | |
| 
 | |
|     if (spapr->fwnmi_machine_check_interlock != cpu->vcpu_id) {
 | |
|         /*
 | |
| 	 * The vCPU that hit the NMI should invoke "ibm,nmi-interlock"
 | |
|          * This should be PARAM_ERROR, but Linux calls "ibm,nmi-interlock"
 | |
| 	 * for system reset interrupts, despite them not being interlocked.
 | |
| 	 * PowerVM silently ignores this and returns success here. Returning
 | |
| 	 * failure causes Linux to print the error "FWNMI: nmi-interlock
 | |
| 	 * failed: -3", although no other apparent ill effects, this is a
 | |
| 	 * regression for the user when enabling FWNMI. So for now, match
 | |
| 	 * PowerVM. When most Linux clients are fixed, this could be
 | |
| 	 * changed.
 | |
| 	 */
 | |
|         rtas_st(rets, 0, RTAS_OUT_SUCCESS);
 | |
|         return;
 | |
|     }
 | |
| 
 | |
|     /*
 | |
|      * vCPU issuing "ibm,nmi-interlock" is done with NMI handling,
 | |
|      * hence unset fwnmi_machine_check_interlock.
 | |
|      */
 | |
|     spapr->fwnmi_machine_check_interlock = -1;
 | |
|     qemu_cond_signal(&spapr->fwnmi_machine_check_interlock_cond);
 | |
|     rtas_st(rets, 0, RTAS_OUT_SUCCESS);
 | |
|     migrate_del_blocker(spapr->fwnmi_migration_blocker);
 | |
| }
 | |
| 
 | |
| static struct rtas_call {
 | |
|     const char *name;
 | |
|     spapr_rtas_fn fn;
 | |
| } rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE];
 | |
| 
 | |
| target_ulong spapr_rtas_call(PowerPCCPU *cpu, SpaprMachineState *spapr,
 | |
|                              uint32_t token, uint32_t nargs, target_ulong args,
 | |
|                              uint32_t nret, target_ulong rets)
 | |
| {
 | |
|     if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) {
 | |
|         struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE);
 | |
| 
 | |
|         if (call->fn) {
 | |
|             call->fn(cpu, spapr, token, nargs, args, nret, rets);
 | |
|             return H_SUCCESS;
 | |
|         }
 | |
|     }
 | |
| 
 | |
|     /* HACK: Some Linux early debug code uses RTAS display-character,
 | |
|      * but assumes the token value is 0xa (which it is on some real
 | |
|      * machines) without looking it up in the device tree.  This
 | |
|      * special case makes this work */
 | |
|     if (token == 0xa) {
 | |
|         rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets);
 | |
|         return H_SUCCESS;
 | |
|     }
 | |
| 
 | |
|     hcall_dprintf("Unknown RTAS token 0x%x\n", token);
 | |
|     rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
 | |
|     return H_PARAMETER;
 | |
| }
 | |
| 
 | |
| uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args,
 | |
|                          uint32_t nret, uint64_t rets)
 | |
| {
 | |
|     int token;
 | |
| 
 | |
|     for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) {
 | |
|         if (strcmp(cmd, rtas_table[token].name) == 0) {
 | |
|             SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
 | |
|             PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
 | |
| 
 | |
|             rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE,
 | |
|                                  nargs, args, nret, rets);
 | |
|             return H_SUCCESS;
 | |
|         }
 | |
|     }
 | |
|     return H_PARAMETER;
 | |
| }
 | |
| 
 | |
| void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn)
 | |
| {
 | |
|     assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX));
 | |
| 
 | |
|     token -= RTAS_TOKEN_BASE;
 | |
| 
 | |
|     assert(!name || !rtas_table[token].name);
 | |
| 
 | |
|     rtas_table[token].name = name;
 | |
|     rtas_table[token].fn = fn;
 | |
| }
 | |
| 
 | |
| void spapr_dt_rtas_tokens(void *fdt, int rtas)
 | |
| {
 | |
|     int i;
 | |
| 
 | |
|     for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) {
 | |
|         struct rtas_call *call = &rtas_table[i];
 | |
| 
 | |
|         if (!call->name) {
 | |
|             continue;
 | |
|         }
 | |
| 
 | |
|         _FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE));
 | |
|     }
 | |
| }
 | |
| 
 | |
| hwaddr spapr_get_rtas_addr(void)
 | |
| {
 | |
|     SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
 | |
|     int rtas_node;
 | |
|     const fdt32_t *rtas_data;
 | |
|     void *fdt = spapr->fdt_blob;
 | |
| 
 | |
|     /* fetch rtas addr from fdt */
 | |
|     rtas_node = fdt_path_offset(fdt, "/rtas");
 | |
|     if (rtas_node < 0) {
 | |
|         return 0;
 | |
|     }
 | |
| 
 | |
|     rtas_data = fdt_getprop(fdt, rtas_node, "linux,rtas-base", NULL);
 | |
|     if (!rtas_data) {
 | |
|         return 0;
 | |
|     }
 | |
| 
 | |
|     /*
 | |
|      * We assume that the OS called RTAS instantiate-rtas, but some other
 | |
|      * OS might call RTAS instantiate-rtas-64 instead. This fine as of now
 | |
|      * as SLOF only supports 32-bit variant.
 | |
|      */
 | |
|     return (hwaddr)fdt32_to_cpu(*rtas_data);
 | |
| }
 | |
| 
 | |
| static void core_rtas_register_types(void)
 | |
| {
 | |
|     spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character",
 | |
|                         rtas_display_character);
 | |
|     spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off);
 | |
|     spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot",
 | |
|                         rtas_system_reboot);
 | |
|     spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state",
 | |
|                         rtas_query_cpu_stopped_state);
 | |
|     spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu);
 | |
|     spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self);
 | |
|     spapr_rtas_register(RTAS_IBM_SUSPEND_ME, "ibm,suspend-me",
 | |
|                         rtas_ibm_suspend_me);
 | |
|     spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER,
 | |
|                         "ibm,get-system-parameter",
 | |
|                         rtas_ibm_get_system_parameter);
 | |
|     spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER,
 | |
|                         "ibm,set-system-parameter",
 | |
|                         rtas_ibm_set_system_parameter);
 | |
|     spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term",
 | |
|                         rtas_ibm_os_term);
 | |
|     spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level",
 | |
|                         rtas_set_power_level);
 | |
|     spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
 | |
|                         rtas_get_power_level);
 | |
|     spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
 | |
|                         rtas_ibm_nmi_register);
 | |
|     spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
 | |
|                         rtas_ibm_nmi_interlock);
 | |
| }
 | |
| 
 | |
| type_init(core_rtas_register_types)
 |