 bab52d4bba
			
		
	
	
		bab52d4bba
		
	
	
	
	
		
			
			Add support for "-cpu max" for ARM guests. This CPU type behaves like "-cpu host" when KVM is enabled, and like a system CPU with the maximum possible feature set otherwise. (Note that this means it won't be migratable across versions, as we will likely add features to it in future.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20180308130626.12393-4-peter.maydell@linaro.org
		
			
				
	
	
		
			93 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			93 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * QEMU ARM CPU
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|  *
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|  * Copyright (c) 2012 SUSE LINUX Products GmbH
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License
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|  * as published by the Free Software Foundation; either version 2
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|  * of the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, see
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|  * <http://www.gnu.org/licenses/gpl-2.0.html>
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|  */
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| #ifndef QEMU_ARM_CPU_QOM_H
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| #define QEMU_ARM_CPU_QOM_H
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| 
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| #include "qom/cpu.h"
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| 
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| struct arm_boot_info;
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| 
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| #define TYPE_ARM_CPU "arm-cpu"
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| 
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| #define ARM_CPU_CLASS(klass) \
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|     OBJECT_CLASS_CHECK(ARMCPUClass, (klass), TYPE_ARM_CPU)
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| #define ARM_CPU(obj) \
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|     OBJECT_CHECK(ARMCPU, (obj), TYPE_ARM_CPU)
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| #define ARM_CPU_GET_CLASS(obj) \
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|     OBJECT_GET_CLASS(ARMCPUClass, (obj), TYPE_ARM_CPU)
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| 
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| #define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU
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| 
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| /**
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|  * ARMCPUClass:
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|  * @parent_realize: The parent class' realize handler.
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|  * @parent_reset: The parent class' reset handler.
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|  *
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|  * An ARM CPU model.
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|  */
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| typedef struct ARMCPUClass {
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|     /*< private >*/
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|     CPUClass parent_class;
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|     /*< public >*/
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| 
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|     DeviceRealize parent_realize;
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|     void (*parent_reset)(CPUState *cpu);
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| } ARMCPUClass;
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| 
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| typedef struct ARMCPU ARMCPU;
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| 
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| #define TYPE_AARCH64_CPU "aarch64-cpu"
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| #define AARCH64_CPU_CLASS(klass) \
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|     OBJECT_CLASS_CHECK(AArch64CPUClass, (klass), TYPE_AARCH64_CPU)
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| #define AARCH64_CPU_GET_CLASS(obj) \
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|     OBJECT_GET_CLASS(AArch64CPUClass, (obj), TYPE_AArch64_CPU)
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| 
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| typedef struct AArch64CPUClass {
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|     /*< private >*/
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|     ARMCPUClass parent_class;
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|     /*< public >*/
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| } AArch64CPUClass;
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| 
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| void register_cp_regs_for_features(ARMCPU *cpu);
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| void init_cpreg_list(ARMCPU *cpu);
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| 
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| /* Callback functions for the generic timer's timers. */
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| void arm_gt_ptimer_cb(void *opaque);
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| void arm_gt_vtimer_cb(void *opaque);
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| void arm_gt_htimer_cb(void *opaque);
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| void arm_gt_stimer_cb(void *opaque);
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| 
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| #define ARM_AFF0_SHIFT 0
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| #define ARM_AFF0_MASK  (0xFFULL << ARM_AFF0_SHIFT)
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| #define ARM_AFF1_SHIFT 8
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| #define ARM_AFF1_MASK  (0xFFULL << ARM_AFF1_SHIFT)
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| #define ARM_AFF2_SHIFT 16
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| #define ARM_AFF2_MASK  (0xFFULL << ARM_AFF2_SHIFT)
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| #define ARM_AFF3_SHIFT 32
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| #define ARM_AFF3_MASK  (0xFFULL << ARM_AFF3_SHIFT)
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| #define ARM_DEFAULT_CPUS_PER_CLUSTER 8
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| 
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| #define ARM32_AFFINITY_MASK (ARM_AFF0_MASK|ARM_AFF1_MASK|ARM_AFF2_MASK)
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| #define ARM64_AFFINITY_MASK \
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|     (ARM_AFF0_MASK|ARM_AFF1_MASK|ARM_AFF2_MASK|ARM_AFF3_MASK)
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| #define ARM64_AFFINITY_INVALID (~ARM64_AFFINITY_MASK)
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| 
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| #endif
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