ec8595578f
Move the common code from loongson_ipi.c to loongson_ipi_common.c, call parent_realize() instead of loongson_ipi_common_realize() in loongson_ipi_realize(). Signed-off-by: Bibo Mao <maobibo@loongson.cn> [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Tested-by: Bibo Mao <maobibo@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <20240805180622.21001-12-philmd@linaro.org>
75 lines
2.1 KiB
C
75 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Loongson ipi interrupt header files
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*
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* Copyright (C) 2021 Loongson Technology Corporation Limited
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*/
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#ifndef HW_LOONGSON_IPI_COMMON_H
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#define HW_LOONGSON_IPI_COMMON_H
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#include "qom/object.h"
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#include "hw/sysbus.h"
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#include "exec/memattrs.h"
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#define IPI_MBX_NUM 4
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#define TYPE_LOONGSON_IPI_COMMON "loongson_ipi_common"
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OBJECT_DECLARE_TYPE(LoongsonIPICommonState,
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LoongsonIPICommonClass, LOONGSON_IPI_COMMON)
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typedef struct IPICore {
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LoongsonIPICommonState *ipi;
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uint32_t status;
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uint32_t en;
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uint32_t set;
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uint32_t clear;
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/* 64bit buf divide into 2 32-bit buf */
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uint32_t buf[IPI_MBX_NUM * 2];
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qemu_irq irq;
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} IPICore;
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struct LoongsonIPICommonState {
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SysBusDevice parent_obj;
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MemoryRegion ipi_iocsr_mem;
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MemoryRegion ipi64_iocsr_mem;
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uint32_t num_cpu;
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IPICore *cpu;
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};
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struct LoongsonIPICommonClass {
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SysBusDeviceClass parent_class;
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DeviceRealize parent_realize;
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DeviceUnrealize parent_unrealize;
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AddressSpace *(*get_iocsr_as)(CPUState *cpu);
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CPUState *(*cpu_by_arch_id)(int64_t id);
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};
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MemTxResult loongson_ipi_core_readl(void *opaque, hwaddr addr, uint64_t *data,
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unsigned size, MemTxAttrs attrs);
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MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, uint64_t val,
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unsigned size, MemTxAttrs attrs);
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/* Mainy used by iocsr read and write */
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#define SMP_IPI_MAILBOX 0x1000ULL
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#define CORE_STATUS_OFF 0x0
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#define CORE_EN_OFF 0x4
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#define CORE_SET_OFF 0x8
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#define CORE_CLEAR_OFF 0xc
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#define CORE_BUF_20 0x20
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#define CORE_BUF_28 0x28
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#define CORE_BUF_30 0x30
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#define CORE_BUF_38 0x38
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#define IOCSR_IPI_SEND 0x40
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#define IOCSR_MAIL_SEND 0x48
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#define IOCSR_ANY_SEND 0x158
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#define MAIL_SEND_ADDR (SMP_IPI_MAILBOX + IOCSR_MAIL_SEND)
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#define MAIL_SEND_OFFSET 0
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#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND)
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#endif
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