b8158192fa
Add an XML description for SSE registers (XMM+MXCSR) for both X86 and X86-64 architectures in the GDB stub: - configure: Define gdb_xml_files for the X86 targets (32 and 64bit). - gdb-xml/i386-32bit-sse.xml & gdb-xml/i386-64bit-sse.xml: The XML files that contain a description of the XMM + MXCSR registers. - gdb-xml/i386-32bit.xml & gdb-xml/i386-64bit.xml: wrappers that include the XML file of the core registers and the other XML file of the SSE registers. - target/i386/cpu.c: Modify the gdb_core_xml_file to the new XML wrapper, modify the gdb_num_core_regs to fit the registers number defined in each XML file. Signed-off-by: Abdallah Bouassida <abdallah.bouassida@lauterbach.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
53 lines
2.0 KiB
XML
53 lines
2.0 KiB
XML
<?xml version="1.0"?>
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<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.i386.32bit.sse">
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<vector id="v4f" type="ieee_single" count="4"/>
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<vector id="v2d" type="ieee_double" count="2"/>
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<vector id="v16i8" type="int8" count="16"/>
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<vector id="v8i16" type="int16" count="8"/>
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<vector id="v4i32" type="int32" count="4"/>
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<vector id="v2i64" type="int64" count="2"/>
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<union id="vec128">
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<field name="v4_float" type="v4f"/>
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<field name="v2_double" type="v2d"/>
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<field name="v16_int8" type="v16i8"/>
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<field name="v8_int16" type="v8i16"/>
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<field name="v4_int32" type="v4i32"/>
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<field name="v2_int64" type="v2i64"/>
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<field name="uint128" type="uint128"/>
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</union>
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<flags id="i386_mxcsr" size="4">
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<field name="IE" start="0" end="0"/>
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<field name="DE" start="1" end="1"/>
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<field name="ZE" start="2" end="2"/>
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<field name="OE" start="3" end="3"/>
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<field name="UE" start="4" end="4"/>
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<field name="PE" start="5" end="5"/>
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<field name="DAZ" start="6" end="6"/>
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<field name="IM" start="7" end="7"/>
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<field name="DM" start="8" end="8"/>
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<field name="ZM" start="9" end="9"/>
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<field name="OM" start="10" end="10"/>
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<field name="UM" start="11" end="11"/>
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<field name="PM" start="12" end="12"/>
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<field name="FZ" start="15" end="15"/>
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</flags>
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<reg name="xmm0" bitsize="128" type="vec128" regnum="32"/>
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<reg name="xmm1" bitsize="128" type="vec128"/>
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<reg name="xmm2" bitsize="128" type="vec128"/>
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<reg name="xmm3" bitsize="128" type="vec128"/>
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<reg name="xmm4" bitsize="128" type="vec128"/>
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<reg name="xmm5" bitsize="128" type="vec128"/>
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<reg name="xmm6" bitsize="128" type="vec128"/>
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<reg name="xmm7" bitsize="128" type="vec128"/>
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<reg name="mxcsr" bitsize="32" type="i386_mxcsr" group="vector"/>
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</feature>
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