Luc Michel 3bb0b03897 intc/arm_gic: Implement GICD_ISACTIVERn and GICD_ICACTIVERn registers
Implement GICD_ISACTIVERn and GICD_ICACTIVERn registers in the GICv2.
Those registers allow to set or clear the active state of an IRQ in the
distributor.

Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180727095421.386-3-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-08-14 17:17:19 +01:00
..
2018-07-24 17:02:02 +01:00
2018-07-17 17:06:32 +01:00
2018-07-17 17:06:32 +01:00
2018-07-02 19:07:19 +01:00
2018-07-20 08:30:48 +08:00
2016-01-29 15:07:25 +00:00
2018-07-30 17:41:52 +02:00
2018-07-02 19:07:19 +01:00
2018-07-02 19:07:19 +01:00
2018-06-01 15:14:31 +02:00