 0287d89f3e
			
		
	
	
		0287d89f3e
		
	
	
	
	
		
			
			They are not a big deal, but they upset asan. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
		
			
				
	
	
		
			95 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			95 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * QEMU MIPS interrupt support
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|  *
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|  * Permission is hereby granted, free of charge, to any person obtaining a copy
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|  * of this software and associated documentation files (the "Software"), to deal
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|  * in the Software without restriction, including without limitation the rights
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|  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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|  * copies of the Software, and to permit persons to whom the Software is
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|  * furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice shall be included in
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|  * all copies or substantial portions of the Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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|  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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|  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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|  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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|  * THE SOFTWARE.
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|  */
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| 
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| #include "qemu/osdep.h"
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| #include "qemu/main-loop.h"
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| #include "hw/irq.h"
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| #include "hw/mips/cpudevs.h"
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| #include "cpu.h"
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| #include "sysemu/kvm.h"
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| #include "kvm_mips.h"
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| 
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| static void cpu_mips_irq_request(void *opaque, int irq, int level)
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| {
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|     MIPSCPU *cpu = opaque;
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|     CPUMIPSState *env = &cpu->env;
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|     CPUState *cs = CPU(cpu);
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|     bool locked = false;
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| 
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|     if (irq < 0 || irq > 7) {
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|         return;
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|     }
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| 
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|     /* Make sure locking works even if BQL is already held by the caller */
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|     if (!qemu_mutex_iothread_locked()) {
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|         locked = true;
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|         qemu_mutex_lock_iothread();
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|     }
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| 
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|     if (level) {
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|         env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
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| 
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|         if (kvm_enabled() && irq == 2) {
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|             kvm_mips_set_interrupt(cpu, irq, level);
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|         }
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| 
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|     } else {
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|         env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
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| 
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|         if (kvm_enabled() && irq == 2) {
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|             kvm_mips_set_interrupt(cpu, irq, level);
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|         }
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|     }
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| 
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|     if (env->CP0_Cause & CP0Ca_IP_mask) {
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|         cpu_interrupt(cs, CPU_INTERRUPT_HARD);
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|     } else {
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|         cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
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|     }
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| 
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|     if (locked) {
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|         qemu_mutex_unlock_iothread();
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|     }
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| }
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| 
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| void cpu_mips_irq_init_cpu(MIPSCPU *cpu)
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| {
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|     CPUMIPSState *env = &cpu->env;
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|     qemu_irq *qi;
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|     int i;
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| 
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|     qi = qemu_allocate_irqs(cpu_mips_irq_request, env_archcpu(env), 8);
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|     for (i = 0; i < 8; i++) {
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|         env->irq[i] = qi[i];
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|     }
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|     g_free(qi);
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| }
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| 
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| void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level)
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| {
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|     if (irq < 0 || irq > 2) {
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|         return;
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|     }
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| 
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|     qemu_set_irq(env->irq[irq], level);
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| }
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