 c227f0995e
			
		
	
	
		c227f0995e
		
	
	
	
	
		
			
			In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
		
			
				
	
	
		
			79 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			79 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * ARM RealView Emulation Baseboard Interrupt Controller
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|  *
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|  * Copyright (c) 2006-2007 CodeSourcery.
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|  * Written by Paul Brook
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|  *
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|  * This code is licenced under the GPL.
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|  */
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| 
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| #include "sysbus.h"
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| 
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| #define GIC_NIRQ 96
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| #define NCPU 1
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| 
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| /* Only a single "CPU" interface is present.  */
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| static inline int
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| gic_get_current_cpu(void)
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| {
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|   return 0;
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| }
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| 
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| #include "arm_gic.c"
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| 
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| typedef struct {
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|     gic_state gic;
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|     int iomemtype;
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| } RealViewGICState;
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| 
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| static uint32_t realview_gic_cpu_read(void *opaque, target_phys_addr_t offset)
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| {
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|     gic_state *s = (gic_state *)opaque;
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|     return gic_cpu_read(s, gic_get_current_cpu(), offset);
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| }
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| 
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| static void realview_gic_cpu_write(void *opaque, target_phys_addr_t offset,
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|                           uint32_t value)
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| {
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|     gic_state *s = (gic_state *)opaque;
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|     gic_cpu_write(s, gic_get_current_cpu(), offset, value);
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| }
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| 
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| static CPUReadMemoryFunc * const realview_gic_cpu_readfn[] = {
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|    realview_gic_cpu_read,
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|    realview_gic_cpu_read,
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|    realview_gic_cpu_read
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| };
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| 
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| static CPUWriteMemoryFunc * const realview_gic_cpu_writefn[] = {
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|    realview_gic_cpu_write,
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|    realview_gic_cpu_write,
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|    realview_gic_cpu_write
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| };
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| 
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| static void realview_gic_map(SysBusDevice *dev, target_phys_addr_t base)
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| {
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|     RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);
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|     cpu_register_physical_memory(base, 0x1000, s->iomemtype);
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|     cpu_register_physical_memory(base + 0x1000, 0x1000, s->gic.iomemtype);
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| }
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| 
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| static int realview_gic_init(SysBusDevice *dev)
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| {
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|     RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);
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| 
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|     gic_init(&s->gic);
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|     s->iomemtype = cpu_register_io_memory(realview_gic_cpu_readfn,
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|                                           realview_gic_cpu_writefn, s);
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|     sysbus_init_mmio_cb(dev, 0x2000, realview_gic_map);
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|     return 0;
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| }
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| 
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| static void realview_gic_register_devices(void)
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| {
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|     sysbus_register_dev("realview_gic", sizeof(RealViewGICState),
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|                         realview_gic_init);
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| }
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| 
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| device_init(realview_gic_register_devices)
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