We don't need to expose the register layout in the public header, so don't. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: c437f570b2b30ab4170387a3ba2fad7d116a4986.1624001156.git.alistair.francis@wdc.com
		
			
				
	
	
		
			75 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			75 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * QEMU lowRISC Ibex UART device
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 *
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 * Copyright (c) 2020 Western Digital
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#ifndef HW_IBEX_UART_H
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#define HW_IBEX_UART_H
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#include "hw/sysbus.h"
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#include "hw/registerfields.h"
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#include "chardev/char-fe.h"
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#include "qemu/timer.h"
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#include "qom/object.h"
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#define IBEX_UART_TX_FIFO_SIZE 16
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#define IBEX_UART_CLOCK 50000000 /* 50MHz clock */
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#define TYPE_IBEX_UART "ibex-uart"
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OBJECT_DECLARE_SIMPLE_TYPE(IbexUartState, IBEX_UART)
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struct IbexUartState {
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    /* <private> */
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    SysBusDevice parent_obj;
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    /* <public> */
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    MemoryRegion mmio;
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    uint8_t tx_fifo[IBEX_UART_TX_FIFO_SIZE];
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    uint32_t tx_level;
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    uint32_t rx_level;
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    QEMUTimer *fifo_trigger_handle;
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    uint64_t char_tx_time;
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    uint32_t uart_intr_state;
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    uint32_t uart_intr_enable;
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    uint32_t uart_ctrl;
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    uint32_t uart_status;
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    uint32_t uart_rdata;
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    uint32_t uart_fifo_ctrl;
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    uint32_t uart_fifo_status;
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    uint32_t uart_ovrd;
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    uint32_t uart_val;
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    uint32_t uart_timeout_ctrl;
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    Clock *f_clk;
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    CharBackend chr;
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    qemu_irq tx_watermark;
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    qemu_irq rx_watermark;
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    qemu_irq tx_empty;
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    qemu_irq rx_overflow;
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};
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#endif /* HW_IBEX_UART_H */
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