 b994e91b00
			
		
	
	
		b994e91b00
		
	
	
	
	
		
			
			See ISA, 4.4.6 (interrupt option), 4.4.7 (high priority interrupt option) and 4.4.8 (timer interrupt option) for details. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
		
			
				
	
	
		
			135 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			135 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
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|  * All rights reserved.
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|  *
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|  * Redistribution and use in source and binary forms, with or without
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|  * modification, are permitted provided that the following conditions are met:
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|  *     * Redistributions of source code must retain the above copyright
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|  *       notice, this list of conditions and the following disclaimer.
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|  *     * Redistributions in binary form must reproduce the above copyright
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|  *       notice, this list of conditions and the following disclaimer in the
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|  *       documentation and/or other materials provided with the distribution.
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|  *     * Neither the name of the Open Source and Linux Lab nor the
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|  *       names of its contributors may be used to endorse or promote products
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|  *       derived from this software without specific prior written permission.
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|  *
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|  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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|  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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|  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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|  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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|  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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|  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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|  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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|  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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|  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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|  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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|  */
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| 
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| #include "hw.h"
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| #include "pc.h"
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| #include "qemu-log.h"
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| #include "qemu-timer.h"
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| 
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| /* Stub functions for hardware that doesn't exist.  */
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| void pic_info(Monitor *mon)
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| {
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| }
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| 
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| void irq_info(Monitor *mon)
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| {
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| }
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| 
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| void xtensa_advance_ccount(CPUState *env, uint32_t d)
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| {
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|     uint32_t old_ccount = env->sregs[CCOUNT];
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| 
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|     env->sregs[CCOUNT] += d;
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| 
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|     if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT)) {
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|         int i;
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|         for (i = 0; i < env->config->nccompare; ++i) {
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|             if (env->sregs[CCOMPARE + i] - old_ccount <= d) {
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|                 xtensa_timer_irq(env, i, 1);
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|             }
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|         }
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|     }
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| }
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| 
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| void check_interrupts(CPUState *env)
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| {
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|     int minlevel = xtensa_get_cintlevel(env);
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|     uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE];
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|     int level;
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| 
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|     /* If the CPU is halted advance CCOUNT according to the vm_clock time
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|      * elapsed since the moment when it was advanced last time.
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|      */
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|     if (env->halted) {
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|         int64_t now = qemu_get_clock_ns(vm_clock);
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| 
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|         xtensa_advance_ccount(env,
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|                 muldiv64(now - env->halt_clock,
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|                     env->config->clock_freq_khz, 1000000));
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|         env->halt_clock = now;
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|     }
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|     for (level = env->config->nlevel; level > minlevel; --level) {
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|         if (env->config->level_mask[level] & int_set_enabled) {
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|             env->pending_irq_level = level;
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|             cpu_interrupt(env, CPU_INTERRUPT_HARD);
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|             qemu_log_mask(CPU_LOG_INT,
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|                     "%s level = %d, cintlevel = %d, "
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|                     "pc = %08x, a0 = %08x, ps = %08x, "
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|                     "intset = %08x, intenable = %08x, "
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|                     "ccount = %08x\n",
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|                     __func__, level, xtensa_get_cintlevel(env),
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|                     env->pc, env->regs[0], env->sregs[PS],
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|                     env->sregs[INTSET], env->sregs[INTENABLE],
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|                     env->sregs[CCOUNT]);
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|             return;
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|         }
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|     }
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|     env->pending_irq_level = 0;
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|     cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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| }
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| 
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| static void xtensa_set_irq(void *opaque, int irq, int active)
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| {
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|     CPUState *env = opaque;
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| 
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|     if (irq >= env->config->ninterrupt) {
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|         qemu_log("%s: bad IRQ %d\n", __func__, irq);
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|     } else {
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|         uint32_t irq_bit = 1 << irq;
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| 
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|         if (active) {
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|             env->sregs[INTSET] |= irq_bit;
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|         } else if (env->config->interrupt[irq].inttype == INTTYPE_LEVEL) {
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|             env->sregs[INTSET] &= ~irq_bit;
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|         }
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| 
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|         check_interrupts(env);
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|     }
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| }
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| 
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| void xtensa_timer_irq(CPUState *env, uint32_t id, uint32_t active)
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| {
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|     qemu_set_irq(env->irq_inputs[env->config->timerint[id]], active);
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| }
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| 
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| static void xtensa_ccompare_cb(void *opaque)
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| {
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|     CPUState *env = opaque;
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|     xtensa_advance_ccount(env, env->wake_ccount - env->sregs[CCOUNT]);
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| }
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| 
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| void xtensa_irq_init(CPUState *env)
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| {
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|     env->irq_inputs = (void **)qemu_allocate_irqs(
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|             xtensa_set_irq, env, env->config->ninterrupt);
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|     if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT) &&
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|             env->config->nccompare > 0) {
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|         env->ccompare_timer =
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|             qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, env);
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|     }
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| }
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