 fe87aa83c6
			
		
	
	
		fe87aa83c6
		
	
	
	
	
		
			
			Edited report from pahole on amd64 host:
struct PCNetState_st {
...
	uint16_t                   bcr[32];              /*   340    64 */
	/* XXX 4 bytes hole, try to pack */
...
	int                        tx_busy;              /*  4520     4 */
	/* XXX 4 bytes hole, try to pack */
	qemu_irq                   irq;                  /*  4528     8 */
	void                       (*phys_mem_read)(void *, target_phys_addr_t, uint8_t *, int, int); /*  4536     8 */
	/* --- cacheline 71 boundary (4544 bytes) --- */
	void                       (*phys_mem_write)(void *, target_phys_addr_t, uint8_t *, int, int); /*  4544     8 */
	void *                     dma_opaque;           /*  4552     8 */
	int                        looptest;             /*  4560     4 */
	/* size: 4568, cachelines: 72 */
	/* sum members: 4556, holes: 2, sum holes: 8 */
	/* padding: 4 */
	/* last cacheline: 24 bytes */
};	/* definitions: 2 */
Fix by rearranging the structure to avoid padding.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
		
	
			
		
			
				
	
	
		
			45 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			45 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| #define PCNET_IOPORT_SIZE       0x20
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| #define PCNET_PNPMMIO_SIZE      0x20
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| 
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| #define PCNET_LOOPTEST_CRC	1
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| #define PCNET_LOOPTEST_NOCRC	2
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| 
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| #include "memory.h"
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| 
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| typedef struct PCNetState_st PCNetState;
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| 
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| struct PCNetState_st {
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|     NICState *nic;
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|     NICConf conf;
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|     QEMUTimer *poll_timer;
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|     int rap, isr, lnkst;
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|     uint32_t rdra, tdra;
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|     uint8_t prom[16];
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|     uint16_t csr[128];
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|     uint16_t bcr[32];
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|     int xmit_pos;
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|     uint64_t timer;
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|     MemoryRegion mmio;
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|     uint8_t buffer[4096];
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|     qemu_irq irq;
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|     void (*phys_mem_read)(void *dma_opaque, target_phys_addr_t addr,
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|                          uint8_t *buf, int len, int do_bswap);
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|     void (*phys_mem_write)(void *dma_opaque, target_phys_addr_t addr,
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|                           uint8_t *buf, int len, int do_bswap);
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|     void *dma_opaque;
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|     int tx_busy;
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|     int looptest;
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| };
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| 
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| void pcnet_h_reset(void *opaque);
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| void pcnet_ioport_writew(void *opaque, uint32_t addr, uint32_t val);
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| uint32_t pcnet_ioport_readw(void *opaque, uint32_t addr);
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| void pcnet_ioport_writel(void *opaque, uint32_t addr, uint32_t val);
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| uint32_t pcnet_ioport_readl(void *opaque, uint32_t addr);
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| uint32_t pcnet_bcr_readw(PCNetState *s, uint32_t rap);
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| int pcnet_can_receive(VLANClientState *nc);
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| ssize_t pcnet_receive(VLANClientState *nc, const uint8_t *buf, size_t size_);
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| void pcnet_common_cleanup(PCNetState *d);
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| int pcnet_common_init(DeviceState *dev, PCNetState *s, NetClientInfo *info);
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| extern const VMStateDescription vmstate_pcnet;
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