0b8fa32f55
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-4-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for hw/usb/dev-hub.c hw/misc/exynos4210_rng.c hw/misc/bcm2835_rng.c hw/misc/aspeed_scu.c hw/display/virtio-vga.c hw/arm/stm32f205_soc.c; ui/cocoa.m fixed up]
102 lines
2.9 KiB
C
102 lines
2.9 KiB
C
/*
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* LED, Switch and Debug control registers for ARM Integrator Boards
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*
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* This is currently a stub for this functionality but at least
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* ensures something other than unassigned_mem_read() handles access
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* to this area.
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*
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* The real h/w is described at:
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* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0159b/Babbfijf.html
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*
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* Copyright (c) 2013 Alex Bennée <alex@bennee.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "hw/hw.h"
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#include "hw/sysbus.h"
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#include "hw/misc/arm_integrator_debug.h"
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#include "qemu/log.h"
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#include "qemu/module.h"
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#define INTEGRATOR_DEBUG(obj) \
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OBJECT_CHECK(IntegratorDebugState, (obj), TYPE_INTEGRATOR_DEBUG)
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typedef struct {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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} IntegratorDebugState;
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static uint64_t intdbg_control_read(void *opaque, hwaddr offset,
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unsigned size)
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{
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switch (offset >> 2) {
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case 0: /* ALPHA */
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case 1: /* LEDS */
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case 2: /* SWITCHES */
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qemu_log_mask(LOG_UNIMP,
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"%s: returning zero from %" HWADDR_PRIx ":%u\n",
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__func__, offset, size);
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return 0;
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default:
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: Bad offset %" HWADDR_PRIx,
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__func__, offset);
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return 0;
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}
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}
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static void intdbg_control_write(void *opaque, hwaddr offset,
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uint64_t value, unsigned size)
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{
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switch (offset >> 2) {
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case 1: /* ALPHA */
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case 2: /* LEDS */
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case 3: /* SWITCHES */
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/* Nothing interesting implemented yet. */
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qemu_log_mask(LOG_UNIMP,
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"%s: ignoring write of %" PRIu64
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" to %" HWADDR_PRIx ":%u\n",
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__func__, value, offset, size);
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break;
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default:
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: write of %" PRIu64
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" to bad offset %" HWADDR_PRIx "\n",
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__func__, value, offset);
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}
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}
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static const MemoryRegionOps intdbg_control_ops = {
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.read = intdbg_control_read,
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.write = intdbg_control_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void intdbg_control_init(Object *obj)
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{
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SysBusDevice *sd = SYS_BUS_DEVICE(obj);
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IntegratorDebugState *s = INTEGRATOR_DEBUG(obj);
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memory_region_init_io(&s->iomem, obj, &intdbg_control_ops,
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NULL, "dbg-leds", 0x1000000);
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sysbus_init_mmio(sd, &s->iomem);
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}
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static const TypeInfo intdbg_info = {
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.name = TYPE_INTEGRATOR_DEBUG,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(IntegratorDebugState),
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.instance_init = intdbg_control_init,
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};
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static void intdbg_register_types(void)
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{
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type_register_static(&intdbg_info);
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}
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type_init(intdbg_register_types)
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