efdb43b831
CPUs Control device(\\_SB.PCI0) register interface for the x86 arch is IO port based and existing CPUs AML code assumes _CRS objects would evaluate to a system resource which describes IO Port address. But on ARM arch CPUs control device(\\_SB.PRES) register interface is memory-mapped hence _CRS object should evaluate to system resource which describes memory-mapped base address. Update build CPUs AML function to accept both IO/MEMORY region spaces and accordingly update the _CRS object. Co-developed-by: Keqian Zhu <zhukeqian1@huawei.com> Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> Signed-off-by: Salil Mehta <salil.mehta@huawei.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Tested-by: Vishnu Pajjuri <vishnu@os.amperecomputing.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Tested-by: Xianglai Li <lixianglai@loongson.cn> Tested-by: Miguel Luis <miguel.luis@oracle.com> Reviewed-by: Shaoqin Huang <shahuang@redhat.com> Tested-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20240716111502.202344-6-salil.mehta@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
79 lines
2.3 KiB
C
79 lines
2.3 KiB
C
/*
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* QEMU ACPI hotplug utilities
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*
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* Copyright (C) 2016 Red Hat Inc
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*
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* Authors:
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* Igor Mammedov <imammedo@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef ACPI_CPU_H
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#define ACPI_CPU_H
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#include "qapi/qapi-types-acpi.h"
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#include "hw/qdev-core.h"
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#include "hw/acpi/acpi.h"
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#include "hw/acpi/aml-build.h"
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#include "hw/boards.h"
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#include "hw/hotplug.h"
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#define ACPI_CPU_HOTPLUG_REG_LEN 12
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typedef struct AcpiCpuStatus {
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CPUState *cpu;
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uint64_t arch_id;
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bool is_inserting;
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bool is_removing;
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bool fw_remove;
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uint32_t ost_event;
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uint32_t ost_status;
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} AcpiCpuStatus;
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typedef struct CPUHotplugState {
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MemoryRegion ctrl_reg;
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uint32_t selector;
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uint8_t command;
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uint32_t dev_count;
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AcpiCpuStatus *devs;
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} CPUHotplugState;
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void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
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CPUHotplugState *cpu_st, DeviceState *dev, Error **errp);
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void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
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CPUHotplugState *cpu_st,
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DeviceState *dev, Error **errp);
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void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st,
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DeviceState *dev, Error **errp);
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void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
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CPUHotplugState *state, hwaddr base_addr);
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typedef struct CPUHotplugFeatures {
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bool acpi_1_compatible;
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bool has_legacy_cphp;
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bool fw_unplugs_cpu;
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const char *smi_path;
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} CPUHotplugFeatures;
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typedef void (*build_madt_cpu_fn)(int uid, const CPUArchIdList *apic_ids,
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GArray *entry, bool force_enabled);
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void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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build_madt_cpu_fn build_madt_cpu, hwaddr base_addr,
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const char *res_root,
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const char *event_handler_method,
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AmlRegionSpace rs);
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void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list);
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extern const VMStateDescription vmstate_cpu_hotplug;
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#define VMSTATE_CPU_HOTPLUG(cpuhp, state) \
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VMSTATE_STRUCT(cpuhp, state, 1, \
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vmstate_cpu_hotplug, CPUHotplugState)
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#endif
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