c05aec9d4a
GCC versions at least 12 through 15 incorrectly report a warning
about code in sha1.c:
tests/tcg/multiarch/sha1.c:161:13: warning: ‘SHA1Transform’ reading 64 bytes from a region of size 0 [-Wstringop-overread]
161 | SHA1Transform(context->state, &data[i]);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This is a piece of stock library code for doing SHA1 which we've
simply copied, rather than writing ourselves. The bug has been
reported to upstream GCC (about a different library's use of this
code):
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106709
For our test case, since this isn't our original code and there isn't
actually a bug in it, suppress the incorrect warning rather than
trying to modify the code to work around the compiler issue.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2328
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250227141343.1675415-1-peter.maydell@linaro.org>
[AJB: -Wno-unknown-warning-option for clang's sake]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20250304222439.2035603-18-alex.bennee@linaro.org>
158 lines
4.5 KiB
Makefile
158 lines
4.5 KiB
Makefile
# -*- Mode: makefile -*-
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#
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# AArch64 specific tweaks
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ARM_SRC=$(SRC_PATH)/tests/tcg/arm
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VPATH += $(ARM_SRC)
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AARCH64_SRC=$(SRC_PATH)/tests/tcg/aarch64
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VPATH += $(AARCH64_SRC)
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# Base architecture tests
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AARCH64_TESTS=fcvt pcalign-a64 lse2-fault
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AARCH64_TESTS += test-2248 test-2150
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fcvt: LDFLAGS+=-lm
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run-fcvt: fcvt
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$(call run-test,$<,$(QEMU) $<)
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$(call diff-out,$<,$(AARCH64_SRC)/fcvt.ref)
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config-cc.mak: Makefile
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$(quiet-@)( \
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fnia=`$(call cc-test,-fno-integrated-as) && echo -fno-integrated-as`; \
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$(call cc-option,-march=armv8.1-a+sve, CROSS_CC_HAS_SVE); \
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$(call cc-option,-march=armv8.1-a+sve2, CROSS_CC_HAS_SVE2); \
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$(call cc-option,-march=armv8.2-a, CROSS_CC_HAS_ARMV8_2); \
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$(call cc-option,-march=armv8.3-a, CROSS_CC_HAS_ARMV8_3); \
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$(call cc-option,-march=armv8.5-a, CROSS_CC_HAS_ARMV8_5); \
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$(call cc-option,-mbranch-protection=standard, CROSS_CC_HAS_ARMV8_BTI); \
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$(call cc-option,-march=armv8.5-a+memtag, CROSS_CC_HAS_ARMV8_MTE); \
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$(call cc-option,-Wa$(COMMA)-march=armv9-a+sme $$fnia, CROSS_AS_HAS_ARMV9_SME)) 3> config-cc.mak
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-include config-cc.mak
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ifneq ($(CROSS_CC_HAS_ARMV8_2),)
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AARCH64_TESTS += dcpop
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dcpop: CFLAGS += $(CROSS_CC_HAS_ARMV8_2)
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endif
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ifneq ($(CROSS_CC_HAS_ARMV8_5),)
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AARCH64_TESTS += dcpodp
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dcpodp: CFLAGS += $(CROSS_CC_HAS_ARMV8_5)
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endif
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# Pauth Tests
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ifneq ($(CROSS_CC_HAS_ARMV8_3),)
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AARCH64_TESTS += pauth-1 pauth-2 pauth-4 pauth-5 test-2375
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pauth-%: CFLAGS += $(CROSS_CC_HAS_ARMV8_3)
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test-2375: CFLAGS += -march=armv8.3-a
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run-pauth-1: QEMU_OPTS += -cpu max
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run-pauth-2: QEMU_OPTS += -cpu max
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# Choose a cpu with FEAT_Pauth but without FEAT_FPAC for pauth-[45].
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run-pauth-4: QEMU_OPTS += -cpu neoverse-v1
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run-pauth-5: QEMU_OPTS += -cpu neoverse-v1
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endif
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# BTI Tests
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# bti-1 tests the elf notes, so we require special compiler support.
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ifneq ($(CROSS_CC_HAS_ARMV8_BTI),)
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AARCH64_TESTS += bti-1 bti-3
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bti-1 bti-3: CFLAGS += -fno-stack-protector $(CROSS_CC_HAS_ARMV8_BTI)
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bti-1 bti-3: LDFLAGS += -nostdlib
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endif
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# bti-2 tests PROT_BTI, so no special compiler support required.
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AARCH64_TESTS += bti-2
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# MTE Tests
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ifneq ($(CROSS_CC_HAS_ARMV8_MTE),)
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AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-7 mte-8
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mte-%: CFLAGS += $(CROSS_CC_HAS_ARMV8_MTE)
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endif
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# SME Tests
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ifneq ($(CROSS_AS_HAS_ARMV9_SME),)
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SME_TESTS = sme-outprod1 sme-smopa-1 sme-smopa-2 sme-fmopa-1 sme-fmopa-2 sme-fmopa-3
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AARCH64_TESTS += $(SME_TESTS)
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$(SME_TESTS): CFLAGS += $(CROSS_AS_HAS_ARMV9_SME)
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endif
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# System Registers Tests
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AARCH64_TESTS += sysregs
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AARCH64_TESTS += test-aes
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test-aes: CFLAGS += -O -march=armv8-a+aes
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test-aes: test-aes-main.c.inc
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# Vector SHA1
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# Work around compiler false-positive warning, as we do for the 'sha1' test
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sha1-vector: CFLAGS=-O3 -Wno-stringop-overread
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sha1-vector: sha1.c
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$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
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run-sha1-vector: sha1-vector run-sha1
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$(call run-test, $<, $(QEMU) $(QEMU_OPTS) $<)
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$(call diff-out, sha1-vector, sha1.out)
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TESTS += sha1-vector
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# Vector versions of sha512 (-O3 triggers vectorisation)
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sha512-vector: CFLAGS=-O3
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sha512-vector: sha512.c
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$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
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TESTS += sha512-vector
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ifneq ($(CROSS_CC_HAS_SVE),)
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# SVE ioctl test
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AARCH64_TESTS += sve-ioctls
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sve-ioctls: CFLAGS += $(CROSS_CC_HAS_SVE)
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sha512-sve: CFLAGS=-O3 -march=armv8.1-a+sve
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sha512-sve: sha512.c
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$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
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sve-str: CFLAGS=-O1 -march=armv8.1-a+sve
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sve-str: sve-str.c
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$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
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TESTS += sha512-sve sve-str
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ifneq ($(GDB),)
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GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py
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run-gdbstub-sysregs: sysregs
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$(call run-test, $@, $(GDB_SCRIPT) \
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--gdb $(GDB) \
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--qemu $(QEMU) --qargs "$(QEMU_OPTS)" \
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--bin $< --test $(AARCH64_SRC)/gdbstub/test-sve.py, \
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basic gdbstub SVE support)
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run-gdbstub-sve-ioctls: sve-ioctls
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$(call run-test, $@, $(GDB_SCRIPT) \
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--gdb $(GDB) \
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--qemu $(QEMU) --qargs "$(QEMU_OPTS)" \
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--bin $< --test $(AARCH64_SRC)/gdbstub/test-sve-ioctl.py, \
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basic gdbstub SVE ZLEN support)
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EXTRA_RUNS += run-gdbstub-sysregs run-gdbstub-sve-ioctls
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ifeq ($(GDB_HAS_MTE),y)
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run-gdbstub-mte: mte-8
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$(call run-test, $@, $(GDB_SCRIPT) \
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--gdb $(GDB) \
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--qemu $(QEMU) --qargs "$(QEMU_OPTS)" \
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--bin $< --test $(AARCH64_SRC)/gdbstub/test-mte.py \
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-- --mode=user, \
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gdbstub MTE support)
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EXTRA_RUNS += run-gdbstub-mte
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endif
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endif
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endif
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ifneq ($(CROSS_CC_HAS_SVE2),)
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AARCH64_TESTS += test-826
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test-826: CFLAGS += $(CROSS_CC_HAS_SVE2)
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endif
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TESTS += $(AARCH64_TESTS)
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