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1029 Commits

Author SHA1 Message Date
j_mayer
077fc2061e Improve PowerPC CPU state dump. 
Dump NIP on SPR access faults.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3522 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-04 01:57:29 +00:00
j_mayer
2e13d23ac0 Fix PowerPC high BATs access: BAT number was incorrect. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3519 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-03 14:23:07 +00:00
j_mayer
faadf50e29 PowerPC MMU and exception fixes: 
* PowerPC 601 (and probably POWER/POWER2) uses a different BAT format than
  later PowerPC implementation.
* Bugfix in BATs check: must not stop after 4 BATs when more are provided.
* Enable POWER 'rac' instruction.
* Fix exception prefix for all supported PowerPC implementations.
* Fix exceptions, MMU model and bus model for PowerPC 601 & 620.
* Enable PowerPC 620 as it could mostly boot a PreP target.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3518 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-03 13:37:12 +00:00
j_mayer
9fceefa7d1 Don't print any message when a priviledge exception occurs on mfpvr 
as the Linux allows applications to read this register.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3510 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-02 22:47:50 +00:00
j_mayer
5b52b9911f Fix PowerPC program exception that was broken by FPU exception patches 
(bug reported by  Jason Wessel)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3509 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-02 22:35:33 +00:00
j_mayer
fc0d441e14 Fix CR ops with complement, thanks to Julian Seward for testing 
and reporting the bug :
* remove bugged CR ops specific micro-ops
* use standard and / or / shift operations instead
* comment not-used-anymore op_store_T1_crf_crf micro-op template.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3501 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-31 22:02:17 +00:00
j_mayer
86c4a9f513 Fix two PowerPC FPU emulation bugs (thanks to Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3487 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 21:54:35 +00:00
ths
273af66025 Adjust s390 addresses (the MSB is defined as "to be ignored"). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 14:39:49 +00:00
j_mayer
603fcccece Make Alpha and PowerPC targets use shared helpers 
for clz, clo, ctz, cto and ctpop.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3466 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-28 12:54:53 +00:00
j_mayer
a11b8151df PowerPC coding style and inlining fixes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3461 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-28 00:55:05 +00:00
j_mayer
5bda28432f PowerPC floating-point helper typo. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3460 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-27 23:34:30 +00:00
j_mayer
4f8eb6cfa2 PowerPC float bugfix: 64 bits float mantissa is 52 bits long. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3459 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-27 17:59:46 +00:00
j_mayer
7c58044c0a Fix PowerPC FPSCR update and floating-point exception generation 
in most useful cases.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3458 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-27 17:54:30 +00:00
j_mayer
8378e71f13 Fix endianness bug for PowerPC stfiwx instruction. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3456 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-27 17:18:49 +00:00
j_mayer
f0685f6e7a For consistency, align the address to the cache line before using it, 
when invalidating the instruction cache.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3449 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-26 00:55:17 +00:00
j_mayer
dac454af57 Bugfix in PowerPC dcbi instruction: 
we must do a load before the store, or we'll store random data.
Update cache instructions comments.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3448 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-26 00:48:00 +00:00
j_mayer
c7697e1f51 Pretty dump for specific PowerPC instructions names. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3447 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-26 00:46:07 +00:00
j_mayer
f9fdea6b85 Make PowerPC hypervisor resources able to compile, even if not enabled for now. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3446 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-26 00:38:37 +00:00
j_mayer
2c1ee068b4 Bugfix: PowerPC 64 slbia never invalidates the first segment entry. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3445 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-26 00:37:04 +00:00
j_mayer
88ad920b8a Fix PowerPC 64x64 bits multiplication overflow check. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3444 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-25 23:36:08 +00:00
j_mayer
9d901a201b Use host-utils for PowerPC 64 64x64 bits multiplications. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3442 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-25 23:28:36 +00:00
j_mayer
cd346349b4 Add PowerPC power-management state check callback. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3441 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-25 23:27:04 +00:00
j_mayer
2f462816ac Implement power-management for all defined PowerPC CPUs. 
Fix PowerPC 970MP definition.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3440 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-25 23:14:50 +00:00
j_mayer
86f1d3ac73 Update PowerPC emulation status file. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3438 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-25 21:38:16 +00:00
j_mayer
8ca3f6c382 Allow selection of all defined PowerPC 74xx (aka G4) CPUs. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3437 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-25 21:37:25 +00:00
j_mayer
0411a97258 Gprof prooved the PowerPC emulation spent too much time in MSR load and store 
routines. Coming back to a raw MSR storage model then speed-up the emulation.
Improve fast MSR updates (wrtee wrteei and mtriee cases).
Share rfi family instructions helpers code to avoid bug in duplicated code.
Allow entering halt mode as the result of a rfi instruction.
Add a new helper_regs.h file to avoid duplication of special registers
 manipulation routines (currently XER and MSR).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3436 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-25 21:35:50 +00:00
j_mayer
b227a8e9aa Properly implement non-execute bit on PowerPC segments and PTEs. 
Fix page protection bits for PowerPC 64 MMU.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3395 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 10:21:20 +00:00
j_mayer
d68f13063b Merge PowerPC 620 input bus definitions with standard PowerPC 6xx. 
Avoid hardcoding PowerPC interrupts definitions to ease updates.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3393 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 09:27:16 +00:00
j_mayer
a13d7523cb There is no need of a specific MMU model for PowerPC 601. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3392 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 09:14:08 +00:00
j_mayer
eacc324914 Implement PowerPC 64 SLB invalidation helpers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3391 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 09:06:19 +00:00
j_mayer
e63ecc6f68 Do not allow PowerPC CPU restart after entering checkstop mode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3388 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 08:48:23 +00:00
j_mayer
1e42b8f06d Generate micro-ops for PowerPC hypervisor mode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3386 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 08:27:14 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
j_mayer
c732abe222 Unify '-cpu ?' option. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-12 06:47:46 +00:00
j_mayer
9b22787cda Update PowerPC emulation status file. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3355 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-08 03:00:35 +00:00
j_mayer
25ba3a6812 Remove synonymous in PowerPC MSR bits definitions. 
Fix MSR EP bit buggy definition.
Remove unuseful MSR flags.
Fix MSR bits and flags definitions for most supported PowerPC implementations.
Add MSR definitions/flags constistency checks and optional dump.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3354 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-08 02:58:07 +00:00
j_mayer
141c8ae225 Real-mode only PowerPC 40x do not have any TLBs. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3353 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-08 02:44:11 +00:00
j_mayer
4e80effcf9 Implement exception prefix feature for PowerPC 601. 
Fix PowerPC 601 hardware reset vector.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3352 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-08 02:35:41 +00:00
j_mayer
7a3a6927b6 Add missing exception vectors for PowerPC 7x5. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3351 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-08 02:23:00 +00:00
j_mayer
417bf01068 Work-around C89 and/or "old" gcc unspecified behavior (#if in macro calls). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3350 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-07 23:10:08 +00:00
j_mayer
a9d9eb8fd4 Implement PowerPC Altivec load & stores, used by Apple firmware for memcpy. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3349 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-07 18:19:26 +00:00
j_mayer
b33c17e12d PowerPC target coding style fixes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3348 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-07 17:30:34 +00:00
j_mayer
b068d6a713 PowerPC target optimisations: make intensive use of always_inline. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3347 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-07 17:13:44 +00:00
j_mayer
f2e63a42c9 Reorganize the CPUPPCState structure to group features. 
Add #ifdef to avoid compiling not relevant resources:
- MMU related stuff for user-mode only targets
- PowerPC 64 only resources for PowerPC 32 targets
- embedded PowerPC extensions for non-ppcemb targets.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3343 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-07 15:43:50 +00:00
j_mayer
d26bfc9a1b Add MSR bits signification per PowerPC implementation flags (to be continued). 
As a side effect, single step and branch step are available again.
Remove irrelevant MSR bits definitions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-07 14:41:00 +00:00
j_mayer
12de9a396a Full implementation of PowerPC 64 MMU, just missing support for 1 TB 
memory segments.
Remove the PowerPC 64 "bridge" MMU model and implement segment registers
  emulation using SLB entries instead.
Make SLB area size implementation dependant.
Improve TLB & SLB search debug traces.
Temporary hack to make PowerPC 970 boot from ROM instead of RAM.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3335 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-05 22:06:02 +00:00
j_mayer
65f9ee8d67 Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3333 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-05 13:11:25 +00:00
j_mayer
1c27f8fbfe PowerPC hardware reset vector is now considered as part of the exception model. 
Use it at CPU initialisation time.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3332 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-05 13:09:54 +00:00
j_mayer
e57448f11c More cache tuning fixes: 
* fix the tunable cache line size probe for PowerPC 970.
* initialize HID5 so cache line is 32 bytes long when running in user-mode only


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3322 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-04 01:50:03 +00:00
j_mayer
d63001d114 Make PowerPC cache line size implementation dependant. 
Implement dcbz tunable cache line size for PowerPC 970.
Make hardware reset vector implementation dependant.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3321 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-04 00:51:58 +00:00