SYS-OSS/FRET-qemu
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408 Commits

Author SHA1 Message Date
ths
534ce69ff0 More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may 
end up empty for 32bit mips, which dyngen trips over.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2648 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:13:00 +00:00
ths
c090a8f440 Fix CP0_IntCtl handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2645 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:17:31 +00:00
ths
4e7a4a4e84 Mark watchpoint features as unimplemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2643 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:15:41 +00:00
ths
62c5609aa5 Catch unaligned sc/scd. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2642 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:14:21 +00:00
ths
97428a4d84 Fix exception handling cornercase for rdhwr. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2641 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:13:40 +00:00
ths
dac9321024 Remove bogus mtc0 handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2640 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 12:31:31 +00:00
ths
e0c84da78c Implement prefx. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2630 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:11:39 +00:00
ths
cbeb0857da Set proper BadVAddress value for unaligned instruction fetch. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2629 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:11:15 +00:00
ths
e04bcc691b Actually skip over delay slot for a non-taken branch likely. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2628 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:10:22 +00:00
ths
f41c52f170 Save state for all CP0 instructions, they may throw a CPU exception. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2622 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 18:46:01 +00:00
ths
c53f4a62e3 fix branch delay slot cornercases. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2615 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:21:37 +00:00
ths
5a63bcb2d2 Fix rotr immediate ops, mask shift/rotate arguments to their allowed 
size.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2614 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:20:05 +00:00
ths
1579a72ec5 Fix RDHWR handling. Code formatting. Don't use *_direct versions to raise 
exceptions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2611 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:16:25 +00:00
ths
876d4b0783 Fix code formatting. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2595 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-04 21:07:17 +00:00
ths
38121543c7 MIPS32R2 needs RDPGPR/WRPGPR instructions even when no shadow registers 
are implemented.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2589 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-02 17:28:07 +00:00
ths
60aa19abef Actually enable 64bit configuration. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-01 12:36:18 +00:00
ths
24c7b0e330 Sanitize mips exception handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2546 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-30 16:44:54 +00:00
ths
e397ee3382 Fix enough FPU/R2 support to get 24Kf going. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-23 00:43:28 +00:00
ths
3953d78687 Move mips CPU specific initialization to translate_init.c. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2522 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-21 11:04:42 +00:00
ths
3ad4bb2d3d Barf on branches/jumps in branch delay slots. Spotted by Stefan Weil. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2513 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-19 22:15:30 +00:00
ths
820e00f252 Define gen_intermediate_code_internal as "static inline". 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2512 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-19 21:46:06 +00:00
ths
33d68b5f00 MIPS -cpu selection support, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-18 00:30:29 +00:00
ths
6f5b89a07c MIPS Userland TLS register emulation, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2465 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-02 20:48:00 +00:00
ths
36d2395873 MIPS FPU dynamic activation, part 1, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2463 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-28 22:37:42 +00:00
ths
00a709c7b9 Fix mips FPU emulation, 32 bit data types are allowed to use odd registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2454 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-27 19:27:51 +00:00
ths
3594c77487 Replace TLSZ with TARGET_FMT_lx. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2444 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-20 23:37:21 +00:00
ths
b29a0341d7 EBase is limited to KSEG0/KSEG1 even on 64bit CPUs. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2351 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-24 18:01:23 +00:00
ths
9c2149c8e0 Implementing dmfc/dmtc. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2348 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-23 22:45:22 +00:00
ths
5dc4b74480 Scrap SIGN_EXTEND32. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2251 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-21 13:48:28 +00:00
ths
c570fd169c Preliminiary MIPS64 support, disabled by default due to performance impact. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2250 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-21 01:19:56 +00:00
ths
179e32bbcc Fix erraneous fallthrough in MIPS trap implementation, thanks Atsushi Nemoto. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2247 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-16 16:45:18 +00:00
ths
ca7c2b1b9f Handle invalid accesses as SIGILL for mips/mipsel userland emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2235 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-10 22:08:10 +00:00
ths
71fb7241c6 Fix build of MIPS target without FPU support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2233 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-07 20:07:37 +00:00
ths
aa328addc0 Fix reset handling, CP0 isn't enabled by default (a fact which doesn't 
matter when running in kernel space).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2228 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-07 16:22:15 +00:00
ths
e144966416 Simplify mask construction. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2227 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-07 00:30:19 +00:00
ths
bb8a53ad91 Update copyright notice. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2226 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 23:12:49 +00:00
ths
7a387fffce Add MIPS32R2 instructions, and generally straighten out the instruction 
decoding. This is also the first percent towards MIPS64 support.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2224 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 20:17:30 +00:00
ths
8c0fdd856c Dynamically translate MIPS mtc0 instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2223 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 18:19:33 +00:00
ths
873eb01234 Dynamically translate MIPS mfc0 instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2222 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 17:59:07 +00:00
ths
6ae817752b Halt/reboot support for Linux, by Daniel Jacobowitz. This is a band-aid 
until we emulate real MIPS hardware with real firmware.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2221 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 17:48:52 +00:00
ths
814b9a4749 MIPS TLB performance improvements, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2220 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 17:42:40 +00:00
pbrook
417f38f066 MIPS FPU fixes (Daniel Jacobowitz). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2213 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-11-12 23:54:39 +00:00
bellard
dd016883fb add support for cvt.s.d and cvt.d.s (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2198 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-10-23 21:25:11 +00:00
bellard
d796321b6b lwu support - generate exception if unaligned pc (Marius Groeger) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2025 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-26 20:02:45 +00:00
bellard
6ea83fedc8 MIPS FPU support (Marius Goeger) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1964 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-14 12:56:19 +00:00
bellard
3d9fb9fefe cosmetics (Thiemo Seufer) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1936 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-05-22 22:13:29 +00:00
bellard
cd7dd10f09 MIPS CP0 not usable in kernel mode (Stefan Weil) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1829 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-04-23 15:21:24 +00:00
bellard
4ad40f366f MIPS fixes (Daniel Jacobowitz) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1690 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-12-05 19:59:36 +00:00
bellard
eeef26cd42 fixed BLTZAL and BLTZALL insns - fixed regressions from jmp opts 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1667 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-26 18:47:06 +00:00
bellard
173d6cfe51 cpu_exec_init() change 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1643 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-21 23:32:20 +00:00