SYS-OSS/FRET-qemu
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40 Commits

Author SHA1 Message Date
blueswir1
f0d5e47183 Move signal handler prototype back to cpu.h 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5276 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-20 09:05:49 +00:00
blueswir1
d84763bc17 Convert rest of ops using float32 to TCG, remove FT0 and FT1 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-10 20:09:22 +00:00
blueswir1
c8f9349ad9 Remove memcpy32() prototype leftover from r5109 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5114 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-30 09:22:10 +00:00
blueswir1
91736d378b Fix Sparc64 boot on i386 host: 
- move do_interrupt() back to op_helper.c
 - move non-helper prototypes from helper.h to exec.h
 - move some prototypes from cpu.h to exec.h
 - do not export either set_cwp() or cpu_set_cwp() from op_helper.c,
   but instead provide inline functions


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5109 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-29 20:50:21 +00:00
blueswir1
75d0187a52 Remove unused (for now) reg_REGWPTR (original patch by Glauber Costa) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4617 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-29 16:38:41 +00:00
blueswir1
f2bc7e7fa1 Move non-op functions from op_helper.c to helper.c and vice versa. 
Rearrange interrupt handling to match other targets.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4590 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-27 17:35:30 +00:00
blueswir1
4da450e616 Move prototype back to avoid a compiler warning 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4443 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-12 17:59:14 +00:00
bellard
7c60cc4bca suppressed fixed registers 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4408 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-10 10:58:20 +00:00
blueswir1
22548760ca Fix compiler warnings 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-10 10:12:00 +00:00
blueswir1
64a88d5d3a CPU feature selection support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-09 20:13:43 +00:00
blueswir1
0828b4485a Move #include to speed up compilation 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4398 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-09 20:12:09 +00:00
blueswir1
7fa76c0bf3 Complete the TCG conversion 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-04 11:58:45 +00:00
blueswir1
c6d5231deb Remove leftover definitions 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4098 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-21 18:31:43 +00:00
blueswir1
134d77a14b Convert exception ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4022 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-06 20:09:54 +00:00
blueswir1
7e8c2b6ca8 Convert float helpers to TCG, fix fabsq in the process 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-04 20:00:18 +00:00
blueswir1
1a2fb1c009 Modify Sparc32/64 to use TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3989 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-24 14:10:06 +00:00
blueswir1
9c2b428ee1 Fix compilation and warnings on PPC host 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3746 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-28 18:08:28 +00:00
blueswir1
1f58732916 128-bit float support for user mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-25 18:40:20 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
blueswir1
3391c81801 Fix Sparc64 ldfa, lddfa, stfa, and stdfa instructions 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3298 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-30 19:38:12 +00:00
blueswir1
81ad8ba242 Rework ASI instructions (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3205 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-21 19:10:53 +00:00
ths
bfed01fc79 Clean up of some target specifics in exec.c/cpu-exec.c. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-03 17:44:37 +00:00
blueswir1
417454b032 Full implementation of IEEE exceptions (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2625 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 20:03:29 +00:00
ths
8294eba187 SPARC host fixes, by Ben Taylor. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-19 14:47:40 +00:00
ths
01d6a890b4 Sparc arm/mips/sparc register patch, by Martin Bochnig. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2377 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-02 01:03:34 +00:00
bellard
a9049a07bb moved common softmmu code to common header (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1580 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-10-30 18:16:26 +00:00
bellard
aea3ce4c8d restore regwptr (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1576 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-10-30 17:06:11 +00:00
bellard
8346901560 sparc64 fixes (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1514 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-23 14:27:54 +00:00
bellard
ee5bbe38b1 correct split between helper.c and op_helper.c 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1506 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-04 22:18:23 +00:00
bellard
3475187dd8 sparc64 marge (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1462 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-02 14:31:34 +00:00
bellard
878d3096d2 sparc fixes 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1291 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-02-13 19:02:42 +00:00
bellard
9d89330183 clean up - comments 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1271 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-02-07 23:10:53 +00:00
bellard
af7bf89b1f initial sparc64 support - sparc fixes (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1251 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-01-30 22:39:04 +00:00
bellard
e80cfcfc88 SPARC merge 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1179 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-12-19 23:18:01 +00:00
bellard
0d1a29f9fc correct handling of saved host registers 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1122 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-10-12 22:01:28 +00:00
bellard
a0c4cb4a70 sparc fixes 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1117 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-10-10 17:46:24 +00:00
bellard
8d5f07fa3b sparc merge (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1098 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-10-04 21:23:09 +00:00
bellard
e8af50a30e full system SPARC emulation (Blue Swirl) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1083 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-09-30 21:55:55 +00:00
bellard
658138bcbc flush insn support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@743 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-04-25 17:56:08 +00:00
bellard
7a3f194486 sparc emulation target (thanx to Thomas M. Ogrisegg) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@386 c046a42c-6fe2-441c-8c8c-71466251a162
 2003-09-30 20:36:07 +00:00