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148 Commits

Author SHA1 Message Date
blueswir1
f0d5e47183 Move signal handler prototype back to cpu.h 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5276 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-20 09:05:49 +00:00
blueswir1
d84763bc17 Convert rest of ops using float32 to TCG, remove FT0 and FT1 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-10 20:09:22 +00:00
blueswir1
3a3b925d47 Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5185 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-09 19:02:49 +00:00
blueswir1
47ad35f16a Silence gcc warning about constant overflow 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5175 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-06 17:50:16 +00:00
blueswir1
ba6a9d8cda Fix FCC handling for Sparc64 target, initial patch by Vince Weaver 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5110 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-29 21:03:31 +00:00
blueswir1
91736d378b Fix Sparc64 boot on i386 host: 
- move do_interrupt() back to op_helper.c
 - move non-helper prototypes from helper.h to exec.h
 - move some prototypes from cpu.h to exec.h
 - do not export either set_cwp() or cpu_set_cwp() from op_helper.c,
   but instead provide inline functions


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5109 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-29 20:50:21 +00:00
blueswir1
5578ceab94 Use initial CPU definition structure for some CPU fields instead of copying 
them around, based on patch by Luis Pureza.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5042 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-21 17:33:42 +00:00
blueswir1
c19148bd8f Make MAXTL dynamic, bounds check tl when indexing 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4942 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-25 07:42:14 +00:00
blueswir1
0b8f1b102b Sparc32: save/load all MMU registers, Sparc64: add CPU save/load 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4938 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-24 11:28:51 +00:00
blueswir1
74b9decc47 Use MMU globals for some MMU traps 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4918 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-21 18:43:32 +00:00
blueswir1
fb79ceb91a Make UA200x features selectable, add MMU types 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4911 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-20 18:22:16 +00:00
blueswir1
e19e4efeaa Fix MMU miss traps 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4880 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-16 16:55:52 +00:00
pbrook
9656f324d2 Move interrupt_request and user_mode_only to common cpu state. 
Save and restore env->interrupt_request and env->halted.



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-01 20:01:19 +00:00
pbrook
b3c7724cbc Move CPU save/load registration to common code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-30 16:31:04 +00:00
pbrook
2e70f6efa8 Add instruction counter. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-29 01:03:05 +00:00
blueswir1
0bbd4a0ddb Fix compiler warning (Jan Kiszka) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4781 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-23 16:58:04 +00:00
blueswir1
1a14026e11 Allow NWINDOWS selection (CPU feature with model specific defaults) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4690 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-07 08:07:37 +00:00
pbrook
f8ed7070ea Fix typo. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4624 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-30 17:54:15 +00:00
pbrook
6e68e076e7 Move clone() register setup to target specific code. Handle fork-like clone. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4623 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-30 17:22:15 +00:00
blueswir1
e30b467893 MicroSparc I didn't have fsmuld op 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4618 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-29 18:20:36 +00:00
bellard
9133e39b84 Push common interrupt variables to cpu-defs.h (Glauber Costa) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-29 10:08:06 +00:00
bellard
ce5232c5c2 moved halted field to CPU_COMMON 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-28 17:14:10 +00:00
blueswir1
77f193daa8 Wrap long lines 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4440 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-12 16:13:33 +00:00
blueswir1
c5adf6a88d Remove duplicated field 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4411 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-10 12:25:46 +00:00
bellard
7c60cc4bca suppressed fixed registers 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4408 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-10 10:58:20 +00:00
blueswir1
22548760ca Fix compiler warnings 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-10 10:12:00 +00:00
blueswir1
64a88d5d3a CPU feature selection support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-09 20:13:43 +00:00
blueswir1
7fa76c0bf3 Complete the TCG conversion 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-04 11:58:45 +00:00
blueswir1
4b8b8b76d4 Document the shift values 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4243 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-23 17:12:35 +00:00
blueswir1
c48fcb4751 Move CPU stuff unrelated to translation to helper.c 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4133 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-29 15:46:56 +00:00
blueswir1
d9bdab86e8 Convert mulscc to TCG, add cc_src2 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4075 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-16 19:22:18 +00:00
blueswir1
dc99a3f2e8 Convert condition code changing versions of add, sub, logic, and div to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4052 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-13 20:45:31 +00:00
blueswir1
134d77a14b Convert exception ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4022 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-06 20:09:54 +00:00
blueswir1
375ee38b4b Convert Sparc64 trap state ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-05 17:59:48 +00:00
blueswir1
ccd4a21937 Convert tick operations to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4011 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-02 18:28:06 +00:00
blueswir1
9e31b9e28a Fix remote debugger memory access problems reported by Matthias Stein 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3982 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-14 17:46:44 +00:00
blueswir1
3deaeab717 Sparc32 MMU register fixes (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-11 18:27:33 +00:00
blueswir1
3ebf5aafe5 Use slavio base as boot prom address, rearrange sun4m init code 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3747 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-28 20:54:33 +00:00
blueswir1
1f58732916 128-bit float support for user mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-25 18:40:20 +00:00
blueswir1
3dd9a152e1 More MMU registers (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3738 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-25 12:43:10 +00:00
bellard
aaed909a49 added cpu_model parameter to cpu_init() 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-10 15:15:54 +00:00
blueswir1
6d5f237a59 CPU specific boot mode (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-07 17:03:37 +00:00
blueswir1
6f27aba62e Sparc64 hypervisor mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3398 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 17:07:21 +00:00
blueswir1
952a328ff5 SuperSparc MXCC support (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3397 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 16:29:21 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
j_mayer
c732abe222 Unify '-cpu ?' option. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-12 06:47:46 +00:00
ths
198a74de4c Move get_sp_from_cpustate from cpu.h to target_signal.h. 
Enable sigaltstack processing for more architectures.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-27 16:44:32 +00:00
ths
a04e134ad1 linux-user sigaltstack() syscall, by Thayne Harbaugh. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-27 13:57:58 +00:00
blueswir1
40ce0a9a8f CPU boot mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3231 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-24 19:44:09 +00:00
blueswir1
0f8a249a0b Detabify 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3195 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-20 14:54:22 +00:00