SYS-OSS/FRET-qemu
4
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

target/arm: Fix checkpatch brace errors in helper.c

Browse Source 
Fix this:
ERROR: braces {} are necessary for all arms of this statement

Signed-off-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-id: 20221213190537.511-4-farosas@suse.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Fabiano Rosas 2022-12-13 16:05:34 -03:00 committed by Peter Maydell
parent 04215eb100
commit f927dbda86
1 changed files with 42 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

67
target/arm/helper.c
View File

@ -9461,10 +9461,12 @@ void cpsr_write(CPUARMState *env, uint32_t val, uint32_t mask,
env->CF = (val >> 29) & 1; env->CF = (val >> 29) & 1;
env->VF = (val << 3) & 0x80000000; env->VF = (val << 3) & 0x80000000;
} }
if (mask & CPSR_Q) if (mask & CPSR_Q) {
env->QF = ((val & CPSR_Q) != 0); env->QF = ((val & CPSR_Q) != 0);
if (mask & CPSR_T) }
if (mask & CPSR_T) {
env->thumb = ((val & CPSR_T) != 0); env->thumb = ((val & CPSR_T) != 0);
}
if (mask & CPSR_IT_0_1) { if (mask & CPSR_IT_0_1) {
env->condexec_bits &= ~3; env->condexec_bits &= ~3;
env->condexec_bits |= (val >> 25) & 3; env->condexec_bits |= (val >> 25) & 3;
@ -9669,8 +9671,9 @@ static void switch_mode(CPUARMState *env, int mode)
int i; int i;
old_mode = env->uncached_cpsr & CPSR_M; old_mode = env->uncached_cpsr & CPSR_M;
if (mode == old_mode) if (mode == old_mode) {
return; return;
}
if (old_mode == ARM_CPU_MODE_FIQ) { if (old_mode == ARM_CPU_MODE_FIQ) {
memcpy(env->fiq_regs, env->regs + 8, 5 * sizeof(uint32_t)); memcpy(env->fiq_regs, env->regs + 8, 5 * sizeof(uint32_t));
@ -10276,10 +10279,11 @@ static void arm_cpu_do_interrupt_aarch32(CPUState *cs)
new_mode = ARM_CPU_MODE_UND; new_mode = ARM_CPU_MODE_UND;
addr = 0x04; addr = 0x04;
mask = CPSR_I; mask = CPSR_I;
if (env->thumb) if (env->thumb) {
offset = 2; offset = 2;
else } else {
offset = 4; offset = 4;
}
break; break;
case EXCP_SWI: case EXCP_SWI:
new_mode = ARM_CPU_MODE_SVC; new_mode = ARM_CPU_MODE_SVC;
@ -11070,10 +11074,11 @@ static inline uint16_t add16_sat(uint16_t a, uint16_t b)
res = a + b; res = a + b;
if (((res ^ a) & 0x8000) && !((a ^ b) & 0x8000)) { if (((res ^ a) & 0x8000) && !((a ^ b) & 0x8000)) {
if (a & 0x8000) if (a & 0x8000) {
res = 0x8000; res = 0x8000;
else } else {
res = 0x7fff; res = 0x7fff;
}
} }
return res; return res;
} }
@ -11085,10 +11090,11 @@ static inline uint8_t add8_sat(uint8_t a, uint8_t b)
res = a + b; res = a + b;
if (((res ^ a) & 0x80) && !((a ^ b) & 0x80)) { if (((res ^ a) & 0x80) && !((a ^ b) & 0x80)) {
if (a & 0x80) if (a & 0x80) {
res = 0x80; res = 0x80;
else } else {
res = 0x7f; res = 0x7f;
}
} }
return res; return res;
} }
@ -11100,10 +11106,11 @@ static inline uint16_t sub16_sat(uint16_t a, uint16_t b)
res = a - b; res = a - b;
if (((res ^ a) & 0x8000) && ((a ^ b) & 0x8000)) { if (((res ^ a) & 0x8000) && ((a ^ b) & 0x8000)) {
if (a & 0x8000) if (a & 0x8000) {
res = 0x8000; res = 0x8000;
else } else {
res = 0x7fff; res = 0x7fff;
}
} }
return res; return res;
} }
@ -11115,10 +11122,11 @@ static inline uint8_t sub8_sat(uint8_t a, uint8_t b)
res = a - b; res = a - b;
if (((res ^ a) & 0x80) && ((a ^ b) & 0x80)) { if (((res ^ a) & 0x80) && ((a ^ b) & 0x80)) {
if (a & 0x80) if (a & 0x80) {
res = 0x80; res = 0x80;
else } else {
res = 0x7f; res = 0x7f;
}
} }
return res; return res;
} }
@ -11136,34 +11144,38 @@ static inline uint16_t add16_usat(uint16_t a, uint16_t b)
{ {
uint16_t res; uint16_t res;
res = a + b; res = a + b;
if (res < a) if (res < a) {
res = 0xffff; res = 0xffff;
}
return res; return res;
} }
static inline uint16_t sub16_usat(uint16_t a, uint16_t b) static inline uint16_t sub16_usat(uint16_t a, uint16_t b)
{ {
if (a > b) if (a > b) {
return a - b; return a - b;
else } else {
return 0; return 0;
}
} }
static inline uint8_t add8_usat(uint8_t a, uint8_t b) static inline uint8_t add8_usat(uint8_t a, uint8_t b)
{ {
uint8_t res; uint8_t res;
res = a + b; res = a + b;
if (res < a) if (res < a) {
res = 0xff; res = 0xff;
}
return res; return res;
} }
static inline uint8_t sub8_usat(uint8_t a, uint8_t b) static inline uint8_t sub8_usat(uint8_t a, uint8_t b)
{ {
if (a > b) if (a > b) {
return a - b; return a - b;
else } else {
return 0; return 0;
}
} }
#define ADD16(a, b, n) RESULT(add16_usat(a, b), n, 16); #define ADD16(a, b, n) RESULT(add16_usat(a, b), n, 16);
@ -11267,10 +11279,11 @@ static inline uint8_t sub8_usat(uint8_t a, uint8_t b)
static inline uint8_t do_usad(uint8_t a, uint8_t b) static inline uint8_t do_usad(uint8_t a, uint8_t b)
{ {
if (a > b) if (a > b) {
return a - b; return a - b;
else } else {
return b - a; return b - a;
}
} }
/* Unsigned sum of absolute byte differences. */ /* Unsigned sum of absolute byte differences. */
@ -11290,14 +11303,18 @@ uint32_t HELPER(sel_flags)(uint32_t flags, uint32_t a, uint32_t b)
uint32_t mask; uint32_t mask;
mask = 0; mask = 0;
if (flags & 1) if (flags & 1) {
mask |= 0xff; mask |= 0xff;
if (flags & 2) }
if (flags & 2) {
mask |= 0xff00; mask |= 0xff00;
if (flags & 4) }
if (flags & 4) {
mask |= 0xff0000; mask |= 0xff0000;
if (flags & 8) }
if (flags & 8) {
mask |= 0xff000000; mask |= 0xff000000;
}
return (a & mask) | (b & ~mask); return (a & mask) | (b & ~mask);
} }