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target/hppa: Convert hppa_cpu_init() to ResetHold handler

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hppa_cpu_initfn() is called once when a HPPA CPU instance is
initialized, but it sets fields which should be set each time
a CPU resets. Rename it as a reset handler, having it matching
the ResettablePhases::hold() signature, and register it as
ResettableClass handler.

Since on reset the CPU registers and TLB entries are expected
to be zero, add a memset() call clearing CPUHPPAState up to
the &end_reset_fields marker.

Signed-off-by: Helge Deller <deller@gmx.de>
Co-developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20241231190620.24442-3-philmd@linaro.org>
This commit is contained in:
Helge Deller 2024-12-30 12:46:47 +01:00 committed by Philippe Mathieu-Daudé
parent e4a407d2b4
commit f4f4173188
2 changed files with 17 additions and 2 deletions
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14
target/hppa/cpu.c
View File

@ -193,13 +193,20 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp)
tcg_cflags_set(cs, CF_PCREL); tcg_cflags_set(cs, CF_PCREL);
} }
static void hppa_cpu_initfn(Object *obj) static void hppa_cpu_reset_hold(Object *obj, ResetType type)
{ {
HPPACPUClass *scc = HPPA_CPU_GET_CLASS(obj);
CPUState *cs = CPU(obj); CPUState *cs = CPU(obj);
HPPACPU *cpu = HPPA_CPU(obj); HPPACPU *cpu = HPPA_CPU(obj);
CPUHPPAState *env = &cpu->env; CPUHPPAState *env = &cpu->env;
if (scc->parent_phases.hold) {
scc->parent_phases.hold(obj, type);
}
cs->exception_index = -1; cs->exception_index = -1;
memset(env, 0, offsetof(CPUHPPAState, end_reset_fields));
cpu_hppa_loaded_fr0(env); cpu_hppa_loaded_fr0(env);
cpu_hppa_put_psw(env, PSW_W); cpu_hppa_put_psw(env, PSW_W);
} }
@ -242,10 +249,14 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc); DeviceClass *dc = DEVICE_CLASS(oc);
CPUClass *cc = CPU_CLASS(oc); CPUClass *cc = CPU_CLASS(oc);
HPPACPUClass *acc = HPPA_CPU_CLASS(oc); HPPACPUClass *acc = HPPA_CPU_CLASS(oc);
ResettableClass *rc = RESETTABLE_CLASS(oc);
device_class_set_parent_realize(dc, hppa_cpu_realizefn, device_class_set_parent_realize(dc, hppa_cpu_realizefn,
&acc->parent_realize); &acc->parent_realize);
resettable_class_set_parent_phases(rc, NULL, hppa_cpu_reset_hold, NULL,
&acc->parent_phases);
cc->class_by_name = hppa_cpu_class_by_name; cc->class_by_name = hppa_cpu_class_by_name;
cc->has_work = hppa_cpu_has_work; cc->has_work = hppa_cpu_has_work;
cc->mmu_index = hppa_cpu_mmu_index; cc->mmu_index = hppa_cpu_mmu_index;
@ -269,7 +280,6 @@ static const TypeInfo hppa_cpu_type_infos[] = {
.parent = TYPE_CPU, .parent = TYPE_CPU,
.instance_size = sizeof(HPPACPU), .instance_size = sizeof(HPPACPU),
.instance_align = __alignof(HPPACPU), .instance_align = __alignof(HPPACPU),
.instance_init = hppa_cpu_initfn,
.abstract = false, .abstract = false,
.class_size = sizeof(HPPACPUClass), .class_size = sizeof(HPPACPUClass),
.class_init = hppa_cpu_class_init, .class_init = hppa_cpu_class_init,

5
target/hppa/cpu.h
View File

@ -263,6 +263,9 @@ typedef struct CPUArchState {
IntervalTreeRoot tlb_root; IntervalTreeRoot tlb_root;
HPPATLBEntry tlb[HPPA_TLB_ENTRIES]; HPPATLBEntry tlb[HPPA_TLB_ENTRIES];
/* Fields up to this point are cleared by a CPU reset */
struct {} end_reset_fields;
} CPUHPPAState; } CPUHPPAState;
/** /**
@ -281,6 +284,7 @@ struct ArchCPU {
/** /**
* HPPACPUClass: * HPPACPUClass:
* @parent_realize: The parent class' realize handler. * @parent_realize: The parent class' realize handler.
* @parent_phases: The parent class' reset phase handlers.
* *
* An HPPA CPU model. * An HPPA CPU model.
*/ */
@ -288,6 +292,7 @@ struct HPPACPUClass {
CPUClass parent_class; CPUClass parent_class;
DeviceRealize parent_realize; DeviceRealize parent_realize;
ResettablePhases parent_phases;
}; };
#include "exec/cpu-all.h" #include "exec/cpu-all.h"