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target/arm: Use fp_status_f16_a64 in AArch64-only helpers

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We directly use fp_status_f16 in a handful of helpers that are
AArch64-specific; switch to fp_status_f16_a64 for these.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250124162836.2332150-16-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2025-01-24 16:27:35 +00:00
parent 85fffc1085
commit e4b3c388f9
2 changed files with 6 additions and 6 deletions
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4
target/arm/tcg/sme_helper.c
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@ -1038,12 +1038,12 @@ void HELPER(sme_fmopa_h)(void *vza, void *vzn, void *vzm, void *vpn,
float_status fpst_odd, fpst_std, fpst_f16; float_status fpst_odd, fpst_std, fpst_f16;
/* /*
* Make copies of fp_status and fp_status_f16, because this operation * Make copies of the fp status fields we use, because this operation
* does not update the cumulative fp exception status. It also * does not update the cumulative fp exception status. It also
* produces default NaNs. We also need a second copy of fp_status with * produces default NaNs. We also need a second copy of fp_status with
* round-to-odd -- see above. * round-to-odd -- see above.
*/ */
fpst_f16 = env->vfp.fp_status_f16; fpst_f16 = env->vfp.fp_status_f16_a64;
fpst_std = env->vfp.fp_status_a64; fpst_std = env->vfp.fp_status_a64;
set_default_nan_mode(true, &fpst_std); set_default_nan_mode(true, &fpst_std);
set_default_nan_mode(true, &fpst_f16); set_default_nan_mode(true, &fpst_f16);

8
target/arm/tcg/vec_helper.c
View File

@ -2067,7 +2067,7 @@ void HELPER(gvec_fmlal_a64)(void *vd, void *vn, void *vm,
CPUARMState *env, uint32_t desc) CPUARMState *env, uint32_t desc)
{ {
do_fmlal(vd, vn, vm, &env->vfp.fp_status_a64, desc, do_fmlal(vd, vn, vm, &env->vfp.fp_status_a64, desc,
get_flush_inputs_to_zero(&env->vfp.fp_status_f16)); get_flush_inputs_to_zero(&env->vfp.fp_status_f16_a64));
} }
void HELPER(sve2_fmlal_zzzw_s)(void *vd, void *vn, void *vm, void *va, void HELPER(sve2_fmlal_zzzw_s)(void *vd, void *vn, void *vm, void *va,
@ -2077,7 +2077,7 @@ void HELPER(sve2_fmlal_zzzw_s)(void *vd, void *vn, void *vm, void *va,
uint16_t negn = extract32(desc, SIMD_DATA_SHIFT, 1) << 15; uint16_t negn = extract32(desc, SIMD_DATA_SHIFT, 1) << 15;
intptr_t sel = extract32(desc, SIMD_DATA_SHIFT + 1, 1) * sizeof(float16); intptr_t sel = extract32(desc, SIMD_DATA_SHIFT + 1, 1) * sizeof(float16);
float_status *status = &env->vfp.fp_status_a64; float_status *status = &env->vfp.fp_status_a64;
bool fz16 = get_flush_inputs_to_zero(&env->vfp.fp_status_f16); bool fz16 = get_flush_inputs_to_zero(&env->vfp.fp_status_f16_a64);
for (i = 0; i < oprsz; i += sizeof(float32)) { for (i = 0; i < oprsz; i += sizeof(float32)) {
float16 nn_16 = *(float16 *)(vn + H1_2(i + sel)) ^ negn; float16 nn_16 = *(float16 *)(vn + H1_2(i + sel)) ^ negn;
@ -2129,7 +2129,7 @@ void HELPER(gvec_fmlal_idx_a64)(void *vd, void *vn, void *vm,
CPUARMState *env, uint32_t desc) CPUARMState *env, uint32_t desc)
{ {
do_fmlal_idx(vd, vn, vm, &env->vfp.fp_status_a64, desc, do_fmlal_idx(vd, vn, vm, &env->vfp.fp_status_a64, desc,
get_flush_inputs_to_zero(&env->vfp.fp_status_f16)); get_flush_inputs_to_zero(&env->vfp.fp_status_f16_a64));
} }
void HELPER(sve2_fmlal_zzxw_s)(void *vd, void *vn, void *vm, void *va, void HELPER(sve2_fmlal_zzxw_s)(void *vd, void *vn, void *vm, void *va,
@ -2140,7 +2140,7 @@ void HELPER(sve2_fmlal_zzxw_s)(void *vd, void *vn, void *vm, void *va,
intptr_t sel = extract32(desc, SIMD_DATA_SHIFT + 1, 1) * sizeof(float16); intptr_t sel = extract32(desc, SIMD_DATA_SHIFT + 1, 1) * sizeof(float16);
intptr_t idx = extract32(desc, SIMD_DATA_SHIFT + 2, 3) * sizeof(float16); intptr_t idx = extract32(desc, SIMD_DATA_SHIFT + 2, 3) * sizeof(float16);
float_status *status = &env->vfp.fp_status_a64; float_status *status = &env->vfp.fp_status_a64;
bool fz16 = get_flush_inputs_to_zero(&env->vfp.fp_status_f16); bool fz16 = get_flush_inputs_to_zero(&env->vfp.fp_status_f16_a64);
for (i = 0; i < oprsz; i += 16) { for (i = 0; i < oprsz; i += 16) {
float16 mm_16 = *(float16 *)(vm + i + idx); float16 mm_16 = *(float16 *)(vm + i + idx);