target/riscv: use RISCVException enum in exception helpers
Do a cosmetic change in riscv_raise_exception() to change 'exception' type from uint32_t to RISCVException, making it a bit clear that the arg is directly correlated to the RISCVException enum. As a side effect, change 'excp' type from int to RISCVException in generate_exception() to guarantee that all callers of riscv_raise_exception() will use the enum. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250106173734.412353-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -606,7 +606,8 @@ void riscv_translate_code(CPUState *cs, TranslationBlock *tb,
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int *max_insns, vaddr pc, void *host_pc);
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G_NORETURN void riscv_raise_exception(CPURISCVState *env,
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uint32_t exception, uintptr_t pc);
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RISCVException exception,
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uintptr_t pc);
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target_ulong riscv_cpu_get_fflags(CPURISCVState *env);
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void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong);
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@ -27,7 +27,8 @@
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/* Exceptions processing helpers */
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G_NORETURN void riscv_raise_exception(CPURISCVState *env,
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uint32_t exception, uintptr_t pc)
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RISCVException exception,
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uintptr_t pc)
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{
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CPUState *cs = env_cpu(env);
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cs->exception_index = exception;
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@ -245,7 +245,7 @@ static void gen_update_pc(DisasContext *ctx, target_long diff)
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ctx->pc_save = ctx->base.pc_next + diff;
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}
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static void generate_exception(DisasContext *ctx, int excp)
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static void generate_exception(DisasContext *ctx, RISCVException excp)
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{
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gen_update_pc(ctx, 0);
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gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp));
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