hw/isa/piix4: Rename "isa" attribute to "isa_irqs_in"

Rename the "isa" attribute to align it with PIIX3 for consolidation.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-17-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Bernhard Beschow 2023-10-07 14:38:24 +02:00 committed by Michael S. Tsirkin
parent 06f6efefe0
commit de710ac408

View File

@ -45,7 +45,7 @@
struct PIIX4State { struct PIIX4State {
PCIDevice dev; PCIDevice dev;
qemu_irq cpu_intr; qemu_irq cpu_intr;
qemu_irq *isa; qemu_irq *isa_irqs_in;
MC146818RtcState rtc; MC146818RtcState rtc;
PCIIDEState ide; PCIIDEState ide;
@ -75,7 +75,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level)
pic_level |= pci_bus_get_irq_level(bus, i); pic_level |= pci_bus_get_irq_level(bus, i);
} }
} }
qemu_set_irq(s->isa[pic_irq], pic_level); qemu_set_irq(s->isa_irqs_in[pic_irq], pic_level);
} }
} }
@ -201,10 +201,10 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
/* initialize i8259 pic */ /* initialize i8259 pic */
i8259_out_irq = qemu_allocate_irqs(piix4_request_i8259_irq, s, 1); i8259_out_irq = qemu_allocate_irqs(piix4_request_i8259_irq, s, 1);
s->isa = i8259_init(isa_bus, *i8259_out_irq); s->isa_irqs_in = i8259_init(isa_bus, *i8259_out_irq);
/* initialize ISA irqs */ /* initialize ISA irqs */
isa_bus_register_input_irqs(isa_bus, s->isa); isa_bus_register_input_irqs(isa_bus, s->isa_irqs_in);
/* initialize pit */ /* initialize pit */
i8254_pit_init(isa_bus, 0x40, 0, NULL); i8254_pit_init(isa_bus, 0x40, 0, NULL);
@ -236,7 +236,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) { if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) {
return; return;
} }
qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa[9]); qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa_irqs_in[9]);
pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS); pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS);
} }