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target/ppc: Remove msr_fe0 and msr_fe1 macros

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msr_fe0 and msr_fe1 macros hide the usage of env->msr, which is a bad
behavior. Substitute it with FIELD_EX64 calls that explicitly use
env->msr as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-18-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
Víctor Colombo 2022-05-04 18:05:36 -03:00 committed by Daniel Henrique Barboza
parent 5024233091
commit da806a6c63
2 changed files with 15 additions and 14 deletions
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11
target/ppc/cpu.h
View File

@ -363,12 +363,21 @@ FIELD(MSR, EE, MSR_EE, 1)
FIELD(MSR, PR, MSR_PR, 1) FIELD(MSR, PR, MSR_PR, 1)
FIELD(MSR, FP, MSR_FP, 1) FIELD(MSR, FP, MSR_FP, 1)
FIELD(MSR, ME, MSR_ME, 1) FIELD(MSR, ME, MSR_ME, 1)
FIELD(MSR, FE0, MSR_FE0, 1)
FIELD(MSR, FE1, MSR_FE1, 1)
FIELD(MSR, EP, MSR_EP, 1) FIELD(MSR, EP, MSR_EP, 1)
FIELD(MSR, IR, MSR_IR, 1) FIELD(MSR, IR, MSR_IR, 1)
FIELD(MSR, DR, MSR_DR, 1) FIELD(MSR, DR, MSR_DR, 1)
FIELD(MSR, DS, MSR_DS, 1) FIELD(MSR, DS, MSR_DS, 1)
FIELD(MSR, LE, MSR_LE, 1) FIELD(MSR, LE, MSR_LE, 1)
/*
* FE0 and FE1 bits are not side-by-side
* so we can't combine them using FIELD()
*/
#define FIELD_EX64_FE(msr) \
((FIELD_EX64(msr, MSR, FE0) << 1) | FIELD_EX64(msr, MSR, FE1))
/* PMU bits */ /* PMU bits */
#define MMCR0_FC PPC_BIT(32) /* Freeze Counters */ #define MMCR0_FC PPC_BIT(32) /* Freeze Counters */
#define MMCR0_PMAO PPC_BIT(56) /* Perf Monitor Alert Ocurred */ #define MMCR0_PMAO PPC_BIT(56) /* Perf Monitor Alert Ocurred */
@ -484,9 +493,7 @@ FIELD(MSR, LE, MSR_LE, 1)
#else #else
#define msr_hv (0) #define msr_hv (0)
#endif #endif
#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
#define msr_de ((env->msr >> MSR_DE) & 1) #define msr_de ((env->msr >> MSR_DE) & 1)
#define msr_fe1 ((env->msr >> MSR_FE1) & 1)
#define msr_ts ((env->msr >> MSR_TS1) & 3) #define msr_ts ((env->msr >> MSR_TS1) & 3)
#define DBCR0_ICMP (1 << 27) #define DBCR0_ICMP (1 << 27)

18
target/ppc/excp_helper.c
View File

@ -478,8 +478,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception */ case POWERPC_EXCP_PROGRAM: /* Program exception */
switch (env->error_code & ~0xF) { switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP: case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || if (!FIELD_EX64_FE(env->msr) || !FIELD_EX64(env->msr, MSR, FP)) {
!FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore(); trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu); powerpc_reset_excp_state(cpu);
return; return;
@ -616,8 +615,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception */ case POWERPC_EXCP_PROGRAM: /* Program exception */
switch (env->error_code & ~0xF) { switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP: case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || if (!FIELD_EX64_FE(env->msr) || !FIELD_EX64(env->msr, MSR, FP)) {
!FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore(); trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu); powerpc_reset_excp_state(cpu);
return; return;
@ -790,8 +788,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception */ case POWERPC_EXCP_PROGRAM: /* Program exception */
switch (env->error_code & ~0xF) { switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP: case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || if (!FIELD_EX64_FE(env->msr) || !FIELD_EX64(env->msr, MSR, FP)) {
!FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore(); trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu); powerpc_reset_excp_state(cpu);
return; return;
@ -976,8 +973,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception */ case POWERPC_EXCP_PROGRAM: /* Program exception */
switch (env->error_code & ~0xF) { switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP: case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || if (!FIELD_EX64_FE(env->msr) || !FIELD_EX64(env->msr, MSR, FP)) {
!FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore(); trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu); powerpc_reset_excp_state(cpu);
return; return;
@ -1175,8 +1171,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception */ case POWERPC_EXCP_PROGRAM: /* Program exception */
switch (env->error_code & ~0xF) { switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP: case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || if (!FIELD_EX64_FE(env->msr) || !FIELD_EX64(env->msr, MSR, FP)) {
!FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore(); trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu); powerpc_reset_excp_state(cpu);
return; return;
@ -1439,8 +1434,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception */ case POWERPC_EXCP_PROGRAM: /* Program exception */
switch (env->error_code & ~0xF) { switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP: case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || if (!FIELD_EX64_FE(env->msr) || !FIELD_EX64(env->msr, MSR, FP)) {
!FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore(); trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu); powerpc_reset_excp_state(cpu);
return; return;