target/mips: Require even maskbits in update_pagemask
The number of bits set in PageMask must be even. Fixes: d40b55bc1b86 ("target/mips: Fix PageMask with variable page size") Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250328175526.368121-3-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: qemu-stable@nongnu.org
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@ -866,24 +866,17 @@ void helper_mtc0_memorymapid(CPUMIPSState *env, target_ulong arg1)
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void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask)
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{
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uint32_t mask;
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int maskbits;
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/* Don't care MASKX as we don't support 1KB page */
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mask = extract32((uint32_t)arg1, CP0PM_MASK, 16);
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maskbits = cto32(mask);
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uint32_t mask = extract32((uint32_t)arg1, CP0PM_MASK, 16);
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int maskbits = cto32(mask);
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/* Ensure no more set bit after first zero */
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if ((mask >> maskbits) != 0) {
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goto invalid;
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/* Ensure no more set bit after first zero, and maskbits even. */
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if ((mask >> maskbits) == 0 && maskbits % 2 == 0) {
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env->CP0_PageMask = mask << CP0PM_MASK;
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} else {
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/* When invalid, set to default target page size. */
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env->CP0_PageMask = 0;
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}
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env->CP0_PageMask = mask << CP0PM_MASK;
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return;
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invalid:
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/* When invalid, set to default target page size. */
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env->CP0_PageMask = 0;
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}
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void helper_mtc0_pagemask(CPUMIPSState *env, target_ulong arg1)
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