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target/riscv: rvv: speed up small unit-stride loads and stores

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Calling `vext_continuous_ldst_tlb` for load/stores up to 6 bytes
significantly improves performance.

Co-authored-by: Helene CHELIN <helene.chelin@embecosm.com>
Co-authored-by: Paolo Savini <paolo.savini@embecosm.com>
Co-authored-by: Craig Blackmore <craig.blackmore@embecosm.com>

Signed-off-by: Helene CHELIN <helene.chelin@embecosm.com>
Signed-off-by: Paolo Savini <paolo.savini@embecosm.com>
Signed-off-by: Craig Blackmore <craig.blackmore@embecosm.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20241218142353.1027938-3-craig.blackmore@embecosm.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Craig Blackmore 2024-12-18 14:23:53 +00:00 committed by Alistair Francis
parent ffd23ae2a6
commit d4ce7ef4b3
1 changed files with 16 additions and 0 deletions
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16
target/riscv/vector_helper.c
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@ -393,6 +393,22 @@ vext_ldst_us(void *vd, target_ulong base, CPURISCVState *env, uint32_t desc,
return; return;
} }
#if defined(CONFIG_USER_ONLY)
/*
* For data sizes <= 6 bytes we get better performance by simply calling
* vext_continuous_ldst_tlb
*/
if (nf == 1 && (evl << log2_esz) <= 6) {
addr = base + (env->vstart << log2_esz);
vext_continuous_ldst_tlb(env, ldst_tlb, vd, evl, addr, env->vstart, ra,
esz, is_load);
env->vstart = 0;
vext_set_tail_elems_1s(evl, vd, desc, nf, esz, max_elems);
return;
}
#endif
/* Calculate the page range of first page */ /* Calculate the page range of first page */
addr = base + ((env->vstart * nf) << log2_esz); addr = base + ((env->vstart * nf) << log2_esz);
page_split = -(addr | TARGET_PAGE_MASK); page_split = -(addr | TARGET_PAGE_MASK);