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target/riscv: fixes a bug against ssamoswap behavior in M-mode

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Commit f06bfe3dc38c ("target/riscv: implement zicfiss instructions") adds
`ssamoswap` instruction. `ssamoswap` takes the code-point from existing
reserved encoding (and not a zimop like other shadow stack instructions).
If shadow stack is not enabled (via xenvcfg.SSE) and effective priv is
less than M then `ssamoswap` must result in an illegal instruction
exception. However if effective priv is M, then `ssamoswap` results in
store/AMO access fault. See Section "22.2.3. Shadow Stack Memory
Protection" of priv spec.

Fixes: f06bfe3dc38c ("target/riscv: implement zicfiss instructions")

Reported-by: Ved Shanbhogue <ved@rivosinc.com>
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250306064636.452396-2-debug@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Deepak Gupta 2025-03-05 22:46:36 -08:00 committed by Alistair Francis
parent 86c78b2806
commit d2c5759c8d
1 changed files with 17 additions and 0 deletions
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17
target/riscv/insn_trans/trans_rvzicfiss.c.inc
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@ -15,6 +15,13 @@
* You should have received a copy of the GNU General Public License along with * You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>. * this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#define REQUIRE_ZICFISS(ctx) do { \
if (!ctx->cfg_ptr->ext_zicfiss) { \
return false; \
} \
} while (0)
static bool trans_sspopchk(DisasContext *ctx, arg_sspopchk *a) static bool trans_sspopchk(DisasContext *ctx, arg_sspopchk *a)
{ {
if (!ctx->bcfi_enabled) { if (!ctx->bcfi_enabled) {
@ -77,6 +84,11 @@ static bool trans_ssrdp(DisasContext *ctx, arg_ssrdp *a)
static bool trans_ssamoswap_w(DisasContext *ctx, arg_amoswap_w *a) static bool trans_ssamoswap_w(DisasContext *ctx, arg_amoswap_w *a)
{ {
REQUIRE_A_OR_ZAAMO(ctx); REQUIRE_A_OR_ZAAMO(ctx);
REQUIRE_ZICFISS(ctx);
if (ctx->priv == PRV_M) {
generate_exception(ctx, RISCV_EXCP_STORE_AMO_ACCESS_FAULT);
}
if (!ctx->bcfi_enabled) { if (!ctx->bcfi_enabled) {
return false; return false;
} }
@ -97,6 +109,11 @@ static bool trans_ssamoswap_d(DisasContext *ctx, arg_amoswap_w *a)
{ {
REQUIRE_64BIT(ctx); REQUIRE_64BIT(ctx);
REQUIRE_A_OR_ZAAMO(ctx); REQUIRE_A_OR_ZAAMO(ctx);
REQUIRE_ZICFISS(ctx);
if (ctx->priv == PRV_M) {
generate_exception(ctx, RISCV_EXCP_STORE_AMO_ACCESS_FAULT);
}
if (!ctx->bcfi_enabled) { if (!ctx->bcfi_enabled) {
return false; return false;
} }