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hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container'

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Having all its address range mapped by subregions,
s->mmio MemoryRegion effectively became a container.
Rename it as 'container' for clarity.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20241112181044.92193-21-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2024-11-11 17:44:53 +01:00
parent 0bd0ba87a0
commit ce336679b7
1 changed files with 8 additions and 8 deletions
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16
hw/net/xilinx_ethlite.c
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@ -85,7 +85,7 @@ struct XlnxXpsEthLite
{
SysBusDevice parent_obj;
MemoryRegion mmio;
MemoryRegion container;
qemu_irq irq;
NICState *nic;
NICConf conf;
@ -300,7 +300,7 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error **errp)
{
XlnxXpsEthLite *s = XILINX_ETHLITE(dev);
memory_region_init(&s->mmio, OBJECT(dev),
memory_region_init(&s->container, OBJECT(dev),
"xlnx.xps-ethernetlite", 0x2000);
object_initialize_child(OBJECT(dev), "ethlite.mdio", &s->mdio,
@ -308,31 +308,31 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error **errp)
qdev_prop_set_string(DEVICE(&s->mdio), "name", "ethlite.mdio");
qdev_prop_set_uint64(DEVICE(&s->mdio), "size", 4 * 4);
sysbus_realize(SYS_BUS_DEVICE(&s->mdio), &error_fatal);
memory_region_add_subregion(&s->mmio, A_MDIO_BASE,
memory_region_add_subregion(&s->container, A_MDIO_BASE,
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mdio), 0));
for (unsigned i = 0; i < 2; i++) {
memory_region_init_ram(&s->port[i].txbuf, OBJECT(dev),
i ? "ethlite.tx[1]buf" : "ethlite.tx[0]buf",
BUFSZ_MAX, &error_abort);
memory_region_add_subregion(&s->mmio, 0x0800 * i, &s->port[i].txbuf);
memory_region_add_subregion(&s->container, 0x0800 * i, &s->port[i].txbuf);
memory_region_init_io(&s->port[i].txio, OBJECT(dev),
&eth_porttx_ops, s,
i ? "ethlite.tx[1]io" : "ethlite.tx[0]io",
4 * TX_MAX);
memory_region_add_subregion(&s->mmio, i ? A_TX_BASE1 : A_TX_BASE0,
memory_region_add_subregion(&s->container, i ? A_TX_BASE1 : A_TX_BASE0,
&s->port[i].txio);
memory_region_init_ram(&s->port[i].rxbuf, OBJECT(dev),
i ? "ethlite.rx[1]buf" : "ethlite.rx[0]buf",
BUFSZ_MAX, &error_abort);
memory_region_add_subregion(&s->mmio, 0x1000 + 0x0800 * i,
memory_region_add_subregion(&s->container, 0x1000 + 0x0800 * i,
&s->port[i].rxbuf);
memory_region_init_io(&s->port[i].rxio, OBJECT(dev),
&eth_portrx_ops, s,
i ? "ethlite.rx[1]io" : "ethlite.rx[0]io",
4 * RX_MAX);
memory_region_add_subregion(&s->mmio, i ? A_RX_BASE1 : A_RX_BASE0,
memory_region_add_subregion(&s->container, i ? A_RX_BASE1 : A_RX_BASE0,
&s->port[i].rxio);
}
@ -348,7 +348,7 @@ static void xilinx_ethlite_init(Object *obj)
XlnxXpsEthLite *s = XILINX_ETHLITE(obj);
sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->container);
}
static const Property xilinx_ethlite_properties[] = {