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include/exec/memop: Rename get_alignment_bits

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Rename to use "memop_" prefix, like other functions
that operate on MemOp.

Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2024-10-04 13:34:42 -07:00
parent da335fe12a
commit c5809eee45
9 changed files with 16 additions and 16 deletions
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4
accel/tcg/cputlb.c
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@ -1709,7 +1709,7 @@ static bool mmu_lookup(CPUState *cpu, vaddr addr, MemOpIdx oi,
tcg_debug_assert(l->mmu_idx < NB_MMU_MODES); tcg_debug_assert(l->mmu_idx < NB_MMU_MODES);
/* Handle CPU specific unaligned behaviour */ /* Handle CPU specific unaligned behaviour */
a_bits = get_alignment_bits(l->memop); a_bits = memop_alignment_bits(l->memop);
if (addr & ((1 << a_bits) - 1)) { if (addr & ((1 << a_bits) - 1)) {
cpu_unaligned_access(cpu, addr, type, l->mmu_idx, ra); cpu_unaligned_access(cpu, addr, type, l->mmu_idx, ra);
} }
@ -1797,7 +1797,7 @@ static void *atomic_mmu_lookup(CPUState *cpu, vaddr addr, MemOpIdx oi,
{ {
uintptr_t mmu_idx = get_mmuidx(oi); uintptr_t mmu_idx = get_mmuidx(oi);
MemOp mop = get_memop(oi); MemOp mop = get_memop(oi);
int a_bits = get_alignment_bits(mop); int a_bits = memop_alignment_bits(mop);
uintptr_t index; uintptr_t index;
CPUTLBEntry *tlbe; CPUTLBEntry *tlbe;
vaddr tlb_addr; vaddr tlb_addr;

4
accel/tcg/user-exec.c
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@ -954,7 +954,7 @@ void page_reset_target_data(target_ulong start, target_ulong last) { }
static void *cpu_mmu_lookup(CPUState *cpu, vaddr addr, static void *cpu_mmu_lookup(CPUState *cpu, vaddr addr,
MemOp mop, uintptr_t ra, MMUAccessType type) MemOp mop, uintptr_t ra, MMUAccessType type)
{ {
int a_bits = get_alignment_bits(mop); int a_bits = memop_alignment_bits(mop);
void *ret; void *ret;
/* Enforce guest required alignment. */ /* Enforce guest required alignment. */
@ -1236,7 +1236,7 @@ static void *atomic_mmu_lookup(CPUState *cpu, vaddr addr, MemOpIdx oi,
int size, uintptr_t retaddr) int size, uintptr_t retaddr)
{ {
MemOp mop = get_memop(oi); MemOp mop = get_memop(oi);
int a_bits = get_alignment_bits(mop); int a_bits = memop_alignment_bits(mop);
void *ret; void *ret;
/* Enforce guest required alignment. */ /* Enforce guest required alignment. */

4
include/exec/memop.h
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@ -171,12 +171,12 @@ static inline bool memop_big_endian(MemOp op)
} }
/** /**
* get_alignment_bits * memop_alignment_bits:
* @memop: MemOp value * @memop: MemOp value
* *
* Extract the alignment size from the memop. * Extract the alignment size from the memop.
*/ */
static inline unsigned get_alignment_bits(MemOp memop) static inline unsigned memop_alignment_bits(MemOp memop)
{ {
unsigned a = memop & MO_AMASK; unsigned a = memop & MO_AMASK;

4
target/arm/tcg/translate-a64.c
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@ -294,7 +294,7 @@ static TCGv_i64 gen_mte_check1_mmuidx(DisasContext *s, TCGv_i64 addr,
desc = FIELD_DP32(desc, MTEDESC, TBI, s->tbid); desc = FIELD_DP32(desc, MTEDESC, TBI, s->tbid);
desc = FIELD_DP32(desc, MTEDESC, TCMA, s->tcma); desc = FIELD_DP32(desc, MTEDESC, TCMA, s->tcma);
desc = FIELD_DP32(desc, MTEDESC, WRITE, is_write); desc = FIELD_DP32(desc, MTEDESC, WRITE, is_write);
desc = FIELD_DP32(desc, MTEDESC, ALIGN, get_alignment_bits(memop)); desc = FIELD_DP32(desc, MTEDESC, ALIGN, memop_alignment_bits(memop));
desc = FIELD_DP32(desc, MTEDESC, SIZEM1, memop_size(memop) - 1); desc = FIELD_DP32(desc, MTEDESC, SIZEM1, memop_size(memop) - 1);
ret = tcg_temp_new_i64(); ret = tcg_temp_new_i64();
@ -326,7 +326,7 @@ TCGv_i64 gen_mte_checkN(DisasContext *s, TCGv_i64 addr, bool is_write,
desc = FIELD_DP32(desc, MTEDESC, TBI, s->tbid); desc = FIELD_DP32(desc, MTEDESC, TBI, s->tbid);
desc = FIELD_DP32(desc, MTEDESC, TCMA, s->tcma); desc = FIELD_DP32(desc, MTEDESC, TCMA, s->tcma);
desc = FIELD_DP32(desc, MTEDESC, WRITE, is_write); desc = FIELD_DP32(desc, MTEDESC, WRITE, is_write);
desc = FIELD_DP32(desc, MTEDESC, ALIGN, get_alignment_bits(single_mop)); desc = FIELD_DP32(desc, MTEDESC, ALIGN, memop_alignment_bits(single_mop));
desc = FIELD_DP32(desc, MTEDESC, SIZEM1, total_size - 1); desc = FIELD_DP32(desc, MTEDESC, SIZEM1, total_size - 1);
ret = tcg_temp_new_i64(); ret = tcg_temp_new_i64();

2
target/xtensa/translate.c
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@ -521,7 +521,7 @@ static MemOp gen_load_store_alignment(DisasContext *dc, MemOp mop,
mop |= MO_ALIGN; mop |= MO_ALIGN;
} }
if (!option_enabled(dc, XTENSA_OPTION_UNALIGNED_EXCEPTION)) { if (!option_enabled(dc, XTENSA_OPTION_UNALIGNED_EXCEPTION)) {
tcg_gen_andi_i32(addr, addr, ~0 << get_alignment_bits(mop)); tcg_gen_andi_i32(addr, addr, ~0 << memop_alignment_bits(mop));
} }
return mop; return mop;
} }

4
tcg/arm/tcg-target.c.inc
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@ -1587,7 +1587,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, MemOp opc, TCGReg datalo,
tcg_debug_assert((datalo & 1) == 0); tcg_debug_assert((datalo & 1) == 0);
tcg_debug_assert(datahi == datalo + 1); tcg_debug_assert(datahi == datalo + 1);
/* LDRD requires alignment; double-check that. */ /* LDRD requires alignment; double-check that. */
if (get_alignment_bits(opc) >= MO_64) { if (memop_alignment_bits(opc) >= MO_64) {
if (h.index < 0) { if (h.index < 0) {
tcg_out_ldrd_8(s, h.cond, datalo, h.base, 0); tcg_out_ldrd_8(s, h.cond, datalo, h.base, 0);
break; break;
@ -1691,7 +1691,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, MemOp opc, TCGReg datalo,
tcg_debug_assert((datalo & 1) == 0); tcg_debug_assert((datalo & 1) == 0);
tcg_debug_assert(datahi == datalo + 1); tcg_debug_assert(datahi == datalo + 1);
/* STRD requires alignment; double-check that. */ /* STRD requires alignment; double-check that. */
if (get_alignment_bits(opc) >= MO_64) { if (memop_alignment_bits(opc) >= MO_64) {
if (h.index < 0) { if (h.index < 0) {
tcg_out_strd_8(s, h.cond, datalo, h.base, 0); tcg_out_strd_8(s, h.cond, datalo, h.base, 0);
} else { } else {

2
tcg/sparc64/tcg-target.c.inc
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@ -1133,7 +1133,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
* Otherwise, test for at least natural alignment and defer * Otherwise, test for at least natural alignment and defer
* everything else to the helper functions. * everything else to the helper functions.
*/ */
if (s_bits != get_alignment_bits(opc)) { if (s_bits != memop_alignment_bits(opc)) {
tcg_debug_assert(check_fit_tl(a_mask, 13)); tcg_debug_assert(check_fit_tl(a_mask, 13));
tcg_out_arithi(s, TCG_REG_G0, addr_reg, a_mask, ARITH_ANDCC); tcg_out_arithi(s, TCG_REG_G0, addr_reg, a_mask, ARITH_ANDCC);

6
tcg/tcg-op-ldst.c
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@ -45,7 +45,7 @@ static void check_max_alignment(unsigned a_bits)
static MemOp tcg_canonicalize_memop(MemOp op, bool is64, bool st) static MemOp tcg_canonicalize_memop(MemOp op, bool is64, bool st)
{ {
unsigned a_bits = get_alignment_bits(op); unsigned a_bits = memop_alignment_bits(op);
check_max_alignment(a_bits); check_max_alignment(a_bits);
@ -559,7 +559,7 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCGTemp *addr,
TCGv_i64 ext_addr = NULL; TCGv_i64 ext_addr = NULL;
TCGOpcode opc; TCGOpcode opc;
check_max_alignment(get_alignment_bits(memop)); check_max_alignment(memop_alignment_bits(memop));
tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
/* In serial mode, reduce atomicity. */ /* In serial mode, reduce atomicity. */
@ -676,7 +676,7 @@ static void tcg_gen_qemu_st_i128_int(TCGv_i128 val, TCGTemp *addr,
TCGv_i64 ext_addr = NULL; TCGv_i64 ext_addr = NULL;
TCGOpcode opc; TCGOpcode opc;
check_max_alignment(get_alignment_bits(memop)); check_max_alignment(memop_alignment_bits(memop));
tcg_gen_req_mo(TCG_MO_ST_LD | TCG_MO_ST_ST); tcg_gen_req_mo(TCG_MO_ST_LD | TCG_MO_ST_ST);
/* In serial mode, reduce atomicity. */ /* In serial mode, reduce atomicity. */

2
tcg/tcg.c
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@ -5506,7 +5506,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
static TCGAtomAlign atom_and_align_for_opc(TCGContext *s, MemOp opc, static TCGAtomAlign atom_and_align_for_opc(TCGContext *s, MemOp opc,
MemOp host_atom, bool allow_two_ops) MemOp host_atom, bool allow_two_ops)
{ {
MemOp align = get_alignment_bits(opc); MemOp align = memop_alignment_bits(opc);
MemOp size = opc & MO_SIZE; MemOp size = opc & MO_SIZE;
MemOp half = size ? size - 1 : 0; MemOp half = size ? size - 1 : 0;
MemOp atom = opc & MO_ATOM_MASK; MemOp atom = opc & MO_ATOM_MASK;