SYS-OSS/FRET-qemu
4
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

hw/arm/aspeed: Invert sdhci write protected pin for AST2600 EVB

Browse Source 
The Write Protect pin of SDHCI model is default active low to match the SDHCI
spec. So, write enable the bit 19 should be 1 and write protected the bit 19
should be 0 at the Present State Register (0x24).

According to the design of AST2600 EVB, the Write Protected pin is active
high by default. To support it, introduces a new "sdhci_wp_inverted"
property in ASPEED MACHINE State and set it true for AST2600 EVB
and set "wp_inverted" property true of sdhci-generic model.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/r/20241114094839.4128404-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
Jamin Lin 2024-11-14 17:48:39 +08:00 committed by Cédric Le Goater
parent 134d9e5c0c
commit bf8a471a38
2 changed files with 8 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
hw/arm/aspeed.c
View File

@ -409,6 +409,12 @@ static void aspeed_machine_init(MachineState *machine)
OBJECT(get_system_memory()), &error_abort); OBJECT(get_system_memory()), &error_abort);
object_property_set_link(OBJECT(bmc->soc), "dram", object_property_set_link(OBJECT(bmc->soc), "dram",
OBJECT(machine->ram), &error_abort); OBJECT(machine->ram), &error_abort);
if (amc->sdhci_wp_inverted) {
for (i = 0; i < bmc->soc->sdhci.num_slots; i++) {
object_property_set_bool(OBJECT(&bmc->soc->sdhci.slots[i]),
"wp-inverted", true, &error_abort);
}
}
if (machine->kernel_filename) { if (machine->kernel_filename) {
/* /*
* When booting with a -kernel command line there is no u-boot * When booting with a -kernel command line there is no u-boot
@ -1415,6 +1421,7 @@ static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
amc->num_cs = 1; amc->num_cs = 1;
amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON | amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON |
ASPEED_MAC3_ON; ASPEED_MAC3_ON;
amc->sdhci_wp_inverted = true;
amc->i2c_init = ast2600_evb_i2c_init; amc->i2c_init = ast2600_evb_i2c_init;
mc->default_ram_size = 1 * GiB; mc->default_ram_size = 1 * GiB;
aspeed_machine_class_init_cpus_defaults(mc); aspeed_machine_class_init_cpus_defaults(mc);

1
include/hw/arm/aspeed.h
View File

@ -39,6 +39,7 @@ struct AspeedMachineClass {
uint32_t macs_mask; uint32_t macs_mask;
void (*i2c_init)(AspeedMachineState *bmc); void (*i2c_init)(AspeedMachineState *bmc);
uint32_t uart_default; uint32_t uart_default;
bool sdhci_wp_inverted;
}; };