target/i386: Remove dead assignment to ss in do_interrupt64()

Coverity points out that in do_interrupt64() in the "to inner
privilege" codepath we set "ss = 0", but because we also set
"new_stack = 1" there, later in the function we will always override
that value of ss with "ss = 0 | dpl".

Remove the unnecessary initialization of ss, which allows us to
reduce the scope of the variable to only where it is used.  Borrow a
comment from helper_lcall_protected() that explains what "0 | dpl"
means here.

Resolves: Coverity CID 1527395
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240723162525.1585743-1-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2024-07-23 17:25:25 +01:00
parent 7d01623a1b
commit bde8adb808

View File

@ -926,7 +926,7 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
target_ulong ptr; target_ulong ptr;
int type, dpl, selector, cpl, ist; int type, dpl, selector, cpl, ist;
int has_error_code, new_stack; int has_error_code, new_stack;
uint32_t e1, e2, e3, ss, eflags; uint32_t e1, e2, e3, eflags;
target_ulong old_eip, offset; target_ulong old_eip, offset;
bool set_rf; bool set_rf;
StackAccess sa; StackAccess sa;
@ -1007,7 +1007,6 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
/* to inner privilege */ /* to inner privilege */
new_stack = 1; new_stack = 1;
sa.sp = get_rsp_from_tss(env, ist != 0 ? ist + 3 : dpl); sa.sp = get_rsp_from_tss(env, ist != 0 ? ist + 3 : dpl);
ss = 0;
} else { } else {
/* to same privilege */ /* to same privilege */
if (env->eflags & VM_MASK) { if (env->eflags & VM_MASK) {
@ -1040,7 +1039,7 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
env->eflags &= ~(TF_MASK | VM_MASK | RF_MASK | NT_MASK); env->eflags &= ~(TF_MASK | VM_MASK | RF_MASK | NT_MASK);
if (new_stack) { if (new_stack) {
ss = 0 | dpl; uint32_t ss = 0 | dpl; /* SS = NULL selector with RPL = new CPL */
cpu_x86_load_seg_cache(env, R_SS, ss, 0, 0, dpl << DESC_DPL_SHIFT); cpu_x86_load_seg_cache(env, R_SS, ss, 0, 0, dpl << DESC_DPL_SHIFT);
} }
env->regs[R_ESP] = sa.sp; env->regs[R_ESP] = sa.sp;