hpet: place read-only bits directly in "new_val"

The variable "val" is used for two different purposes.  As an intermediate
value when writing configuration registers, and to store the cleared bits
when writing ISR.

Use "new_val" for the former, and rename the variable so that it is clearer
for the latter case.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2024-07-10 10:55:13 +02:00
parent 5895879aca
commit ba88935b0f

View File

@ -510,7 +510,7 @@ static void hpet_ram_write(void *opaque, hwaddr addr,
{ {
int i; int i;
HPETState *s = opaque; HPETState *s = opaque;
uint64_t old_val, new_val, val; uint64_t old_val, new_val, cleared;
trace_hpet_ram_write(addr, value); trace_hpet_ram_write(addr, value);
old_val = hpet_ram_read(opaque, addr, 4); old_val = hpet_ram_read(opaque, addr, 4);
@ -536,13 +536,12 @@ static void hpet_ram_write(void *opaque, hwaddr addr,
*/ */
update_irq(timer, 0); update_irq(timer, 0);
} }
val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK); new_val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK);
timer->config = (timer->config & 0xffffffff00000000ULL) | val; timer->config = (timer->config & 0xffffffff00000000ULL) | new_val;
if (activating_bit(old_val, new_val, HPET_TN_ENABLE) if (activating_bit(old_val, new_val, HPET_TN_ENABLE)
&& (s->isr & (1 << timer_id))) { && (s->isr & (1 << timer_id))) {
update_irq(timer, 1); update_irq(timer, 1);
} }
if (new_val & HPET_TN_32BIT) { if (new_val & HPET_TN_32BIT) {
timer->cmp = (uint32_t)timer->cmp; timer->cmp = (uint32_t)timer->cmp;
timer->period = (uint32_t)timer->period; timer->period = (uint32_t)timer->period;
@ -623,8 +622,8 @@ static void hpet_ram_write(void *opaque, hwaddr addr,
case HPET_ID: case HPET_ID:
return; return;
case HPET_CFG: case HPET_CFG:
val = hpet_fixup_reg(new_val, old_val, HPET_CFG_WRITE_MASK); new_val = hpet_fixup_reg(new_val, old_val, HPET_CFG_WRITE_MASK);
s->config = (s->config & 0xffffffff00000000ULL) | val; s->config = (s->config & 0xffffffff00000000ULL) | new_val;
if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) { if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) {
/* Enable main counter and interrupt generation. */ /* Enable main counter and interrupt generation. */
s->hpet_offset = s->hpet_offset =
@ -658,9 +657,9 @@ static void hpet_ram_write(void *opaque, hwaddr addr,
trace_hpet_invalid_hpet_cfg(4); trace_hpet_invalid_hpet_cfg(4);
break; break;
case HPET_STATUS: case HPET_STATUS:
val = new_val & s->isr; cleared = new_val & s->isr;
for (i = 0; i < s->num_timers; i++) { for (i = 0; i < s->num_timers; i++) {
if (val & (1 << i)) { if (cleared & (1 << i)) {
update_irq(&s->timer[i], 0); update_irq(&s->timer[i], 0);
} }
} }