target/loongarch: fix bad shift in check_ps()
In expression 1ULL << tlb_ps, left shifting by more than 63 bits has undefined behavior. The shift amount, tlb_ps, is as much as 64. check "tlb_ps >=64" to fix. Resolves: Coverity CID 1593475 Fixes: d882c284a3 ("target/loongarch: check tlb_ps") Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
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@ -43,7 +43,7 @@ enum {
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TLBRET_PE = 7,
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};
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bool check_ps(CPULoongArchState *ent, int ps);
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bool check_ps(CPULoongArchState *ent, uint8_t ps);
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extern const VMStateDescription vmstate_loongarch_cpu;
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@ -115,7 +115,7 @@ target_ulong helper_csrwr_ticlr(CPULoongArchState *env, target_ulong val)
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target_ulong helper_csrwr_pwcl(CPULoongArchState *env, target_ulong val)
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{
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int shift, ptbase;
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uint8_t shift, ptbase;
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int64_t old_v = env->CSR_PWCL;
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/*
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@ -19,12 +19,12 @@
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#include "exec/log.h"
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#include "cpu-csr.h"
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bool check_ps(CPULoongArchState *env, int tlb_ps)
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bool check_ps(CPULoongArchState *env, uint8_t tlb_ps)
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{
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if (tlb_ps > 64) {
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return false;
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}
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return BIT_ULL(tlb_ps) & (env->CSR_PRCFG2);
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if (tlb_ps >= 64) {
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return false;
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}
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return BIT_ULL(tlb_ps) & (env->CSR_PRCFG2);
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}
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void get_dir_base_width(CPULoongArchState *env, uint64_t *dir_base,
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