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target/arm: Use FPST_FPCR_AH for BFCVT* insns

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When FPCR.AH is 1, use FPST_FPCR_AH for:
 * AdvSIMD BFCVT, BFCVTN, BFCVTN2
 * SVE BFCVT, BFCVTNT

so that they get the required behaviour changes.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Peter Maydell 2025-02-01 16:39:16 +00:00
parent a8559e0e53
commit b6295046e6
2 changed files with 25 additions and 8 deletions
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21
target/arm/tcg/translate-a64.c
View File

@ -8503,7 +8503,7 @@ TRANS(FRINTX_s, do_fp1_scalar, a, &f_scalar_frintx, -1)
static const FPScalar1 f_scalar_bfcvt = { static const FPScalar1 f_scalar_bfcvt = {
.gen_s = gen_helper_bfcvt, .gen_s = gen_helper_bfcvt,
}; };
TRANS_FEAT(BFCVT_s, aa64_bf16, do_fp1_scalar, a, &f_scalar_bfcvt, -1) TRANS_FEAT(BFCVT_s, aa64_bf16, do_fp1_scalar_ah, a, &f_scalar_bfcvt, -1)
static const FPScalar1 f_scalar_frint32 = { static const FPScalar1 f_scalar_frint32 = {
NULL, NULL,
@ -9279,12 +9279,27 @@ static void gen_bfcvtn_hs(TCGv_i64 d, TCGv_i64 n)
tcg_gen_extu_i32_i64(d, tmp); tcg_gen_extu_i32_i64(d, tmp);
} }
static ArithOneOp * const f_vector_bfcvtn[] = { static void gen_bfcvtn_ah_hs(TCGv_i64 d, TCGv_i64 n)
{
TCGv_ptr fpst = fpstatus_ptr(FPST_AH);
TCGv_i32 tmp = tcg_temp_new_i32();
gen_helper_bfcvt_pair(tmp, n, fpst);
tcg_gen_extu_i32_i64(d, tmp);
}
static ArithOneOp * const f_vector_bfcvtn[2][3] = {
{
NULL, NULL,
gen_bfcvtn_hs, gen_bfcvtn_hs,
NULL, NULL,
}, {
NULL,
gen_bfcvtn_ah_hs,
NULL,
}
}; };
TRANS_FEAT(BFCVTN_v, aa64_bf16, do_2misc_narrow_vector, a, f_vector_bfcvtn) TRANS_FEAT(BFCVTN_v, aa64_bf16, do_2misc_narrow_vector, a,
f_vector_bfcvtn[s->fpcr_ah])
static bool trans_SHLL_v(DisasContext *s, arg_qrr_e *a) static bool trans_SHLL_v(DisasContext *s, arg_qrr_e *a)
{ {

6
target/arm/tcg/translate-sve.c
View File

@ -3904,7 +3904,8 @@ TRANS_FEAT(FCVT_hs, aa64_sve, gen_gvec_fpst_arg_zpz,
gen_helper_sve_fcvt_hs, a, 0, FPST_A64_F16) gen_helper_sve_fcvt_hs, a, 0, FPST_A64_F16)
TRANS_FEAT(BFCVT, aa64_sve_bf16, gen_gvec_fpst_arg_zpz, TRANS_FEAT(BFCVT, aa64_sve_bf16, gen_gvec_fpst_arg_zpz,
gen_helper_sve_bfcvt, a, 0, FPST_A64) gen_helper_sve_bfcvt, a, 0,
s->fpcr_ah ? FPST_AH : FPST_A64)
TRANS_FEAT(FCVT_dh, aa64_sve, gen_gvec_fpst_arg_zpz, TRANS_FEAT(FCVT_dh, aa64_sve, gen_gvec_fpst_arg_zpz,
gen_helper_sve_fcvt_dh, a, 0, FPST_A64) gen_helper_sve_fcvt_dh, a, 0, FPST_A64)
@ -7054,7 +7055,8 @@ TRANS_FEAT(FCVTNT_ds, aa64_sve2, gen_gvec_fpst_arg_zpz,
gen_helper_sve2_fcvtnt_ds, a, 0, FPST_A64) gen_helper_sve2_fcvtnt_ds, a, 0, FPST_A64)
TRANS_FEAT(BFCVTNT, aa64_sve_bf16, gen_gvec_fpst_arg_zpz, TRANS_FEAT(BFCVTNT, aa64_sve_bf16, gen_gvec_fpst_arg_zpz,
gen_helper_sve_bfcvtnt, a, 0, FPST_A64) gen_helper_sve_bfcvtnt, a, 0,
s->fpcr_ah ? FPST_AH : FPST_A64)
TRANS_FEAT(FCVTLT_hs, aa64_sve2, gen_gvec_fpst_arg_zpz, TRANS_FEAT(FCVTLT_hs, aa64_sve2, gen_gvec_fpst_arg_zpz,
gen_helper_sve2_fcvtlt_hs, a, 0, FPST_A64) gen_helper_sve2_fcvtlt_hs, a, 0, FPST_A64)