target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure
Add CP0_Config3 and CP0_Config5 to DisasContext structure. This is needed for implementing availability control of various instructions. Reviewed-by: "Aleksandar Markovic <amarkovic@wavecomp.com>" Signed-off-by: "Aleksandar Markovic <amarkovic@wavecomp.com>"
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				| @ -1449,6 +1449,8 @@ typedef struct DisasContext { | ||||
|     uint32_t opcode; | ||||
|     int insn_flags; | ||||
|     int32_t CP0_Config1; | ||||
|     int32_t CP0_Config3; | ||||
|     int32_t CP0_Config5; | ||||
|     /* Routine used to access memory */ | ||||
|     int mem_idx; | ||||
|     TCGMemOp default_tcg_memop_mask; | ||||
| @ -23307,6 +23309,8 @@ static void mips_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) | ||||
|     ctx->saved_pc = -1; | ||||
|     ctx->insn_flags = env->insn_flags; | ||||
|     ctx->CP0_Config1 = env->CP0_Config1; | ||||
|     ctx->CP0_Config3 = env->CP0_Config3; | ||||
|     ctx->CP0_Config5 = env->CP0_Config5; | ||||
|     ctx->btarget = 0; | ||||
|     ctx->kscrexist = (env->CP0_Config4 >> CP0C4_KScrExist) & 0xff; | ||||
|     ctx->rxi = (env->CP0_Config3 >> CP0C3_RXI) & 1; | ||||
|  | ||||
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	 Dimitrije Nikolic
						Dimitrije Nikolic