exec: Declare tlb_set_page_full() in 'exec/cputlb.h'
Move CPU TLB related methods to "exec/cputlb.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20241114011310.3615-16-philmd@linaro.org>
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@ -21,6 +21,7 @@
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#define CPUTLB_H
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#define CPUTLB_H
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#include "exec/cpu-common.h"
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#include "exec/cpu-common.h"
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#include "exec/vaddr.h"
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#ifdef CONFIG_TCG
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#ifdef CONFIG_TCG
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@ -39,4 +40,26 @@ void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length);
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#endif
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#endif
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/**
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* tlb_set_page_full:
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* @cpu: CPU context
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* @mmu_idx: mmu index of the tlb to modify
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* @addr: virtual address of the entry to add
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* @full: the details of the tlb entry
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*
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* Add an entry to @cpu tlb index @mmu_idx. All of the fields of
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* @full must be filled, except for xlat_section, and constitute
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* the complete description of the translated page.
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*
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* This is generally called by the target tlb_fill function after
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* having performed a successful page table walk to find the physical
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* address and attributes for the translation.
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*
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* At most one entry for a given virtual address is permitted. Only a
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* single TARGET_PAGE_SIZE region is mapped; @full->lg_page_size is only
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* used by tlb_flush_page.
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*/
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void tlb_set_page_full(CPUState *cpu, int mmu_idx, vaddr addr,
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CPUTLBEntryFull *full);
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#endif
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#endif
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@ -156,28 +156,6 @@ void tlb_flush_range_by_mmuidx_all_cpus_synced(CPUState *cpu,
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uint16_t idxmap,
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uint16_t idxmap,
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unsigned bits);
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unsigned bits);
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/**
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* tlb_set_page_full:
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* @cpu: CPU context
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* @mmu_idx: mmu index of the tlb to modify
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* @addr: virtual address of the entry to add
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* @full: the details of the tlb entry
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*
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* Add an entry to @cpu tlb index @mmu_idx. All of the fields of
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* @full must be filled, except for xlat_section, and constitute
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* the complete description of the translated page.
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*
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* This is generally called by the target tlb_fill function after
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* having performed a successful page table walk to find the physical
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* address and attributes for the translation.
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*
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* At most one entry for a given virtual address is permitted. Only a
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* single TARGET_PAGE_SIZE region is mapped; @full->lg_page_size is only
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* used by tlb_flush_page.
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*/
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void tlb_set_page_full(CPUState *cpu, int mmu_idx, vaddr addr,
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CPUTLBEntryFull *full);
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/**
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/**
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* tlb_set_page_with_attrs:
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* tlb_set_page_with_attrs:
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* @cpu: CPU to add this TLB entry for
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* @cpu: CPU to add this TLB entry for
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@ -20,7 +20,7 @@
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#include "qemu/osdep.h"
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "qemu/log.h"
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#include "cpu.h"
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#include "cpu.h"
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#include "exec/exec-all.h"
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#include "exec/cputlb.h"
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#include "exec/page-protection.h"
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#include "exec/page-protection.h"
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#include "qemu/qemu-print.h"
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#include "qemu/qemu-print.h"
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#include "trace.h"
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#include "trace.h"
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