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target/arm: Convert BFCVT to decodetree

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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241211163036.2297116-30-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2024-12-11 10:29:56 -06:00 committed by Peter Maydell
parent cf85790bb8
commit a55df23398
2 changed files with 10 additions and 19 deletions
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3
target/arm/tcg/a64.decode
View File

@ -45,6 +45,7 @@
&qrrrr_e q rd rn rm ra esz &qrrrr_e q rd rn rm ra esz
@rr_h ........ ... ..... ...... rn:5 rd:5 &rr_e esz=1 @rr_h ........ ... ..... ...... rn:5 rd:5 &rr_e esz=1
@rr_s ........ ... ..... ...... rn:5 rd:5 &rr_e esz=2
@rr_d ........ ... ..... ...... rn:5 rd:5 &rr_e esz=3 @rr_d ........ ... ..... ...... rn:5 rd:5 &rr_e esz=3
@rr_sd ........ ... ..... ...... rn:5 rd:5 &rr_e esz=%esz_sd @rr_sd ........ ... ..... ...... rn:5 rd:5 &rr_e esz=%esz_sd
@rr_hsd ........ ... ..... ...... rn:5 rd:5 &rr_e esz=%esz_hsd @rr_hsd ........ ... ..... ...... rn:5 rd:5 &rr_e esz=%esz_hsd
@ -1337,6 +1338,8 @@ FRINTA_s 00011110 .. 1 001100 10000 ..... ..... @rr_hsd
FRINTX_s 00011110 .. 1 001110 10000 ..... ..... @rr_hsd FRINTX_s 00011110 .. 1 001110 10000 ..... ..... @rr_hsd
FRINTI_s 00011110 .. 1 001111 10000 ..... ..... @rr_hsd FRINTI_s 00011110 .. 1 001111 10000 ..... ..... @rr_hsd
BFCVT_s 00011110 01 1 000110 10000 ..... ..... @rr_s
# Floating-point Immediate # Floating-point Immediate
FMOVI_s 0001 1110 .. 1 imm:8 100 00000 rd:5 esz=%esz_hsd FMOVI_s 0001 1110 .. 1 imm:8 100 00000 rd:5 esz=%esz_hsd

26
target/arm/tcg/translate-a64.c
View File

@ -8420,6 +8420,11 @@ static const FPScalar1 f_scalar_frintx = {
}; };
TRANS(FRINTX_s, do_fp1_scalar, a, &f_scalar_frintx, -1) TRANS(FRINTX_s, do_fp1_scalar, a, &f_scalar_frintx, -1)
static const FPScalar1 f_scalar_bfcvt = {
.gen_s = gen_helper_bfcvt,
};
TRANS_FEAT(BFCVT_s, aa64_bf16, do_fp1_scalar, a, &f_scalar_bfcvt, -1)
/* Floating-point data-processing (1 source) - single precision */ /* Floating-point data-processing (1 source) - single precision */
static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn) static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
{ {
@ -8432,9 +8437,6 @@ static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
tcg_res = tcg_temp_new_i32(); tcg_res = tcg_temp_new_i32();
switch (opcode) { switch (opcode) {
case 0x6: /* BFCVT */
gen_fpst = gen_helper_bfcvt;
break;
case 0x10: /* FRINT32Z */ case 0x10: /* FRINT32Z */
rmode = FPROUNDING_ZERO; rmode = FPROUNDING_ZERO;
gen_fpst = gen_helper_frint32_s; gen_fpst = gen_helper_frint32_s;
@ -8454,6 +8456,7 @@ static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
case 0x1: /* FABS */ case 0x1: /* FABS */
case 0x2: /* FNEG */ case 0x2: /* FNEG */
case 0x3: /* FSQRT */ case 0x3: /* FSQRT */
case 0x6: /* BFCVT */
case 0x8: /* FRINTN */ case 0x8: /* FRINTN */
case 0x9: /* FRINTP */ case 0x9: /* FRINTP */
case 0xa: /* FRINTM */ case 0xa: /* FRINTM */
@ -8652,28 +8655,13 @@ static void disas_fp_1src(DisasContext *s, uint32_t insn)
} }
break; break;
case 0x6:
switch (type) {
case 1: /* BFCVT */
if (!dc_isar_feature(aa64_bf16, s)) {
goto do_unallocated;
}
if (!fp_access_check(s)) {
return;
}
handle_fp_1src_single(s, opcode, rd, rn);
break;
default:
goto do_unallocated;
}
break;
default: default:
do_unallocated: do_unallocated:
case 0x0: /* FMOV */ case 0x0: /* FMOV */
case 0x1: /* FABS */ case 0x1: /* FABS */
case 0x2: /* FNEG */ case 0x2: /* FNEG */
case 0x3: /* FSQRT */ case 0x3: /* FSQRT */
case 0x6: /* BFCVT */
case 0x8: /* FRINTN */ case 0x8: /* FRINTN */
case 0x9: /* FRINTP */ case 0x9: /* FRINTP */
case 0xa: /* FRINTM */ case 0xa: /* FRINTM */