target/i386: Mask CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin CPUs
Zhaoxin CPUs (including vendors "Shanghai" and "Centaurhauls") handle the CMPLegacy bit similarly to Intel CPUs. Therefore, this commit masks the CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin CPUs, just as it is done for Intel CPUs. AMD uses the CMPLegacy bit (CPUID[0x80000001].ECX.bit1) along with other CPUID information to enumerate platform topology (e.g., the number of logical processors per package). However, for Intel and other CPUs that follow Intel's behavior, CPUID[0x80000001].ECX.bit1 is reserved. - Impact on Intel and similar CPUs: This change has no effect on Intel and similar CPUs, as the goal is to accurately emulate CPU CPUID information. - Impact on Linux Guests running on Intel (and similar) vCPUs: During boot, Linux checks if the CPU supports Hyper-Threading. For the Linux kernel before v6.9, if it detects X86_FEATURE_CMP_LEGACY, it assumes Hyper-Threading is not supported. For Intel and similar vCPUs, if the CMPLegacy bit is not masked in CPUID[0x80000001].ECX, Linux will incorrectly assume that Hyper-Threading is not supported, even if the vCPU does support it. Signed-off-by: EwanHai <ewanhai-oc@zhaoxin.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250113074413.297793-5-ewanhai-oc@zhaoxin.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -7804,9 +7804,10 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
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/*
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* The Linux kernel checks for the CMPLegacy bit and
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* discards multiple thread information if it is set.
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* So don't set it here for Intel to make Linux guests happy.
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* So don't set it here for Intel (and other processors
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* following Intel's behavior) to make Linux guests happy.
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*/
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if (!IS_INTEL_CPU(env)) {
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if (!IS_INTEL_CPU(env) && !IS_ZHAOXIN_CPU(env)) {
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env->features[FEAT_8000_0001_ECX] |= CPUID_EXT3_CMP_LEG;
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}
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}
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