target/riscv/kvm: add kvm_riscv_reset_regs_csr()
We're setting reset vals for KVM csrs during kvm_riscv_reset_vcpu(), but in no particular order and missing some of them (like env->mstatus). Create a helper to do that, unclogging reset_vcpu(), and initialize env->mstatus as well. Keep the regs in the same order they appear in struct kvm_riscv_csr from the KVM UAPI, similar to what kvm_riscv_(get|put)_regs_csr are doing. This will make a bit easier to add new KVM CSRs and to verify which values we're writing back to KVM during vcpu reset. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250224123120.1644186-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -613,6 +613,19 @@ static int kvm_riscv_put_regs_core(CPUState *cs)
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return ret;
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return ret;
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}
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}
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static void kvm_riscv_reset_regs_csr(CPURISCVState *env)
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{
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env->mstatus = 0;
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env->mie = 0;
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env->stvec = 0;
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env->sscratch = 0;
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env->sepc = 0;
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env->scause = 0;
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env->stval = 0;
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env->mip = 0;
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env->satp = 0;
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}
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static int kvm_riscv_get_regs_csr(CPUState *cs)
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static int kvm_riscv_get_regs_csr(CPUState *cs)
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{
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{
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CPURISCVState *env = &RISCV_CPU(cs)->env;
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CPURISCVState *env = &RISCV_CPU(cs)->env;
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@ -1617,14 +1630,8 @@ void kvm_riscv_reset_vcpu(RISCVCPU *cpu)
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env->pc = cpu->env.kernel_addr;
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env->pc = cpu->env.kernel_addr;
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env->gpr[10] = kvm_arch_vcpu_id(CPU(cpu)); /* a0 */
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env->gpr[10] = kvm_arch_vcpu_id(CPU(cpu)); /* a0 */
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env->gpr[11] = cpu->env.fdt_addr; /* a1 */
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env->gpr[11] = cpu->env.fdt_addr; /* a1 */
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env->satp = 0;
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env->mie = 0;
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kvm_riscv_reset_regs_csr(env);
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env->stvec = 0;
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env->sscratch = 0;
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env->sepc = 0;
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env->scause = 0;
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env->stval = 0;
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env->mip = 0;
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}
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}
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void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level)
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void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level)
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