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hw/registerfields.h: Add 8bit and 16bit register macros

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Some RX peripheral use 8bit and 16bit registers.
Add the 8bit and 16bit APIs.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200224141923.82118-4-ysato@users.sourceforge.jp>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Yoshinori Sato 2019-03-25 02:03:47 -07:00 committed by Philippe Mathieu-Daudé
parent 4dd6517e36
commit 97175c3f09
1 changed files with 30 additions and 0 deletions
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30
include/hw/registerfields.h
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@ -22,6 +22,14 @@
enum { A_ ## reg = (addr) }; \ enum { A_ ## reg = (addr) }; \
enum { R_ ## reg = (addr) / 4 }; enum { R_ ## reg = (addr) / 4 };
#define REG8(reg, addr) \
enum { A_ ## reg = (addr) }; \
enum { R_ ## reg = (addr) };
#define REG16(reg, addr) \
enum { A_ ## reg = (addr) }; \
enum { R_ ## reg = (addr) / 2 };
/* Define SHIFT, LENGTH and MASK constants for a field within a register */ /* Define SHIFT, LENGTH and MASK constants for a field within a register */
/* This macro will define R_FOO_BAR_MASK, R_FOO_BAR_SHIFT and R_FOO_BAR_LENGTH /* This macro will define R_FOO_BAR_MASK, R_FOO_BAR_SHIFT and R_FOO_BAR_LENGTH
@ -34,6 +42,12 @@
MAKE_64BIT_MASK(shift, length)}; MAKE_64BIT_MASK(shift, length)};
/* Extract a field from a register */ /* Extract a field from a register */
#define FIELD_EX8(storage, reg, field) \
extract8((storage), R_ ## reg ## _ ## field ## _SHIFT, \
R_ ## reg ## _ ## field ## _LENGTH)
#define FIELD_EX16(storage, reg, field) \
extract16((storage), R_ ## reg ## _ ## field ## _SHIFT, \
R_ ## reg ## _ ## field ## _LENGTH)
#define FIELD_EX32(storage, reg, field) \ #define FIELD_EX32(storage, reg, field) \
extract32((storage), R_ ## reg ## _ ## field ## _SHIFT, \ extract32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
R_ ## reg ## _ ## field ## _LENGTH) R_ ## reg ## _ ## field ## _LENGTH)
@ -49,6 +63,22 @@
* Assigning values larger then the target field will result in * Assigning values larger then the target field will result in
* compilation warnings. * compilation warnings.
*/ */
#define FIELD_DP8(storage, reg, field, val) ({ \
struct { \
unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
} v = { .v = val }; \
uint8_t d; \
d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
R_ ## reg ## _ ## field ## _LENGTH, v.v); \
d; })
#define FIELD_DP16(storage, reg, field, val) ({ \
struct { \
unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
} v = { .v = val }; \
uint16_t d; \
d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
R_ ## reg ## _ ## field ## _LENGTH, v.v); \
d; })
#define FIELD_DP32(storage, reg, field, val) ({ \ #define FIELD_DP32(storage, reg, field, val) ({ \
struct { \ struct { \
unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \ unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \