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hw/ppc: Constify all Property

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Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2024-12-13 16:37:35 +00:00
parent 8a1852f8c2
commit 90f5755e8a
20 changed files with 23 additions and 23 deletions
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2
hw/ppc/pnv.c
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@ -2422,7 +2422,7 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp)
}
}
static Property pnv_chip_properties[] = {
static const Property pnv_chip_properties[] = {
DEFINE_PROP_UINT32("chip-id", PnvChip, chip_id, 0),
DEFINE_PROP_UINT64("ram-start", PnvChip, ram_start, 0),
DEFINE_PROP_UINT64("ram-size", PnvChip, ram_size, 0),

2
hw/ppc/pnv_adu.c
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@ -185,7 +185,7 @@ static void pnv_adu_realize(DeviceState *dev, Error **errp)
PNV9_XSCOM_ADU_SIZE);
}
static Property pnv_adu_properties[] = {
static const Property pnv_adu_properties[] = {
DEFINE_PROP_LINK("lpc", PnvADU, lpc, TYPE_PNV_LPC, PnvLpcController *),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/ppc/pnv_chiptod.c
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@ -450,7 +450,7 @@ static int pnv_chiptod_power9_dt_xscom(PnvXScomInterface *dev, void *fdt,
return pnv_chiptod_dt_xscom(dev, fdt, xscom_offset, compat, sizeof(compat));
}
static Property pnv_chiptod_properties[] = {
static const Property pnv_chiptod_properties[] = {
DEFINE_PROP_BOOL("primary", PnvChipTOD, primary, false),
DEFINE_PROP_BOOL("secondary", PnvChipTOD, secondary, false),
DEFINE_PROP_LINK("chip", PnvChipTOD , chip, TYPE_PNV_CHIP, PnvChip *),

4
hw/ppc/pnv_core.c
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@ -435,7 +435,7 @@ static void pnv_core_unrealize(DeviceState *dev)
g_free(pc->threads);
}
static Property pnv_core_properties[] = {
static const Property pnv_core_properties[] = {
DEFINE_PROP_UINT32("hwid", PnvCore, hwid, 0),
DEFINE_PROP_UINT64("hrmor", PnvCore, hrmor, 0),
DEFINE_PROP_BOOL("big-core", PnvCore, big_core, false),
@ -693,7 +693,7 @@ static void pnv_quad_power10_realize(DeviceState *dev, Error **errp)
pqc->xscom_qme_size);
}
static Property pnv_quad_properties[] = {
static const Property pnv_quad_properties[] = {
DEFINE_PROP_UINT32("quad-id", PnvQuad, quad_id, 0),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/ppc/pnv_homer.c
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@ -412,7 +412,7 @@ static void pnv_homer_realize(DeviceState *dev, Error **errp)
hmrc->homer_size);
}
static Property pnv_homer_properties[] = {
static const Property pnv_homer_properties[] = {
DEFINE_PROP_LINK("chip", PnvHomer, chip, TYPE_PNV_CHIP, PnvChip *),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/ppc/pnv_i2c.c
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@ -543,7 +543,7 @@ static void pnv_i2c_realize(DeviceState *dev, Error **errp)
qdev_init_gpio_out(DEVICE(dev), &i2c->psi_irq, 1);
}
static Property pnv_i2c_properties[] = {
static const Property pnv_i2c_properties[] = {
DEFINE_PROP_LINK("chip", PnvI2C, chip, TYPE_PNV_CHIP, PnvChip *),
DEFINE_PROP_UINT32("engine", PnvI2C, engine, 1),
DEFINE_PROP_UINT32("num-busses", PnvI2C, num_busses, 1),

2
hw/ppc/pnv_lpc.c
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@ -828,7 +828,7 @@ static void pnv_lpc_realize(DeviceState *dev, Error **errp)
qdev_init_gpio_out_named(dev, &lpc->psi_irq_lpchc, "LPCHC", 1);
}
static Property pnv_lpc_properties[] = {
static const Property pnv_lpc_properties[] = {
DEFINE_PROP_BOOL("psi-serirq", PnvLpcController, psi_has_serirq, false),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/ppc/pnv_pnor.c
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@ -112,7 +112,7 @@ static void pnv_pnor_realize(DeviceState *dev, Error **errp)
TYPE_PNV_PNOR, s->size);
}
static Property pnv_pnor_properties[] = {
static const Property pnv_pnor_properties[] = {
DEFINE_PROP_INT64("size", PnvPnor, size, 128 * MiB),
DEFINE_PROP_DRIVE("drive", PnvPnor, blk),
DEFINE_PROP_END_OF_LIST(),

2
hw/ppc/pnv_psi.c
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@ -552,7 +552,7 @@ static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset)
return 0;
}
static Property pnv_psi_properties[] = {
static const Property pnv_psi_properties[] = {
DEFINE_PROP_UINT64("bar", PnvPsi, bar, 0),
DEFINE_PROP_UINT64("fsp-bar", PnvPsi, fsp_bar, 0),
DEFINE_PROP_END_OF_LIST(),

2
hw/ppc/ppc405_uc.c
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@ -965,7 +965,7 @@ static void ppc405_cpc_realize(DeviceState *dev, Error **errp)
&dcr_read_epcpc, &dcr_write_epcpc);
}
static Property ppc405_cpc_properties[] = {
static const Property ppc405_cpc_properties[] = {
DEFINE_PROP_UINT32("sys-clk", Ppc405CpcState, sysclk, 0),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/ppc/ppc440_uc.c
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@ -1020,7 +1020,7 @@ static void ppc460ex_pcie_realize(DeviceState *dev, Error **errp)
ppc460ex_pcie_register_dcrs(s);
}
static Property ppc460ex_pcie_props[] = {
static const Property ppc460ex_pcie_props[] = {
DEFINE_PROP_INT32("busnum", PPC460EXPCIEState, num, -1),
DEFINE_PROP_INT32("dcrn-base", PPC460EXPCIEState, dcrn_base, -1),
DEFINE_PROP_LINK("cpu", PPC460EXPCIEState, cpu, TYPE_POWERPC_CPU,

4
hw/ppc/ppc4xx_devs.c
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@ -231,7 +231,7 @@ static void ppc4xx_mal_finalize(Object *obj)
g_free(mal->txctpr);
}
static Property ppc4xx_mal_properties[] = {
static const Property ppc4xx_mal_properties[] = {
DEFINE_PROP_UINT8("txc-num", Ppc4xxMalState, txcnum, 0),
DEFINE_PROP_UINT8("rxc-num", Ppc4xxMalState, rxcnum, 0),
DEFINE_PROP_END_OF_LIST(),
@ -539,7 +539,7 @@ bool ppc4xx_dcr_realize(Ppc4xxDcrDeviceState *dev, PowerPCCPU *cpu,
return sysbus_realize(SYS_BUS_DEVICE(dev), errp);
}
static Property ppc4xx_dcr_properties[] = {
static const Property ppc4xx_dcr_properties[] = {
DEFINE_PROP_LINK("cpu", Ppc4xxDcrDeviceState, cpu, TYPE_POWERPC_CPU,
PowerPCCPU *),
DEFINE_PROP_END_OF_LIST(),

4
hw/ppc/ppc4xx_sdram.c
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@ -425,7 +425,7 @@ static void ppc4xx_sdram_ddr_realize(DeviceState *dev, Error **errp)
s, &sdram_ddr_dcr_read, &sdram_ddr_dcr_write);
}
static Property ppc4xx_sdram_ddr_props[] = {
static const Property ppc4xx_sdram_ddr_props[] = {
DEFINE_PROP_LINK("dram", Ppc4xxSdramDdrState, dram_mr, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_UINT32("nbanks", Ppc4xxSdramDdrState, nbanks, 4),
@ -710,7 +710,7 @@ static void ppc4xx_sdram_ddr2_realize(DeviceState *dev, Error **errp)
s, &sdram_ddr2_dcr_read, &sdram_ddr2_dcr_write);
}
static Property ppc4xx_sdram_ddr2_props[] = {
static const Property ppc4xx_sdram_ddr2_props[] = {
DEFINE_PROP_LINK("dram", Ppc4xxSdramDdr2State, dram_mr, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_UINT32("nbanks", Ppc4xxSdramDdr2State, nbanks, 4),

2
hw/ppc/prep_systemio.c
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@ -285,7 +285,7 @@ static const VMStateDescription vmstate_prep_systemio = {
},
};
static Property prep_systemio_properties[] = {
static const Property prep_systemio_properties[] = {
DEFINE_PROP_UINT8("ibm-planar-id", PrepSystemIoState, ibm_planar_id, 0),
DEFINE_PROP_UINT8("equipment", PrepSystemIoState, equipment, 0),
DEFINE_PROP_END_OF_LIST()

2
hw/ppc/rs6000_mc.c
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@ -207,7 +207,7 @@ static const VMStateDescription vmstate_rs6000mc = {
},
};
static Property rs6000mc_properties[] = {
static const Property rs6000mc_properties[] = {
DEFINE_PROP_UINT32("ram-size", RS6000MCState, ram_size, 0),
DEFINE_PROP_BOOL("auto-configure", RS6000MCState, autoconfigure, true),
DEFINE_PROP_END_OF_LIST()

2
hw/ppc/spapr_cpu_core.c
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@ -361,7 +361,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
}
}
static Property spapr_cpu_core_properties[] = {
static const Property spapr_cpu_core_properties[] = {
DEFINE_PROP_INT32("node-id", SpaprCpuCore, node_id, CPU_UNSET_NUMA_NODE_ID),
DEFINE_PROP_END_OF_LIST()
};

2
hw/ppc/spapr_nvdimm.c
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@ -884,7 +884,7 @@ static void spapr_nvdimm_unrealize(NVDIMMDevice *dimm)
vmstate_unregister(NULL, &vmstate_spapr_nvdimm_states, dimm);
}
static Property spapr_nvdimm_properties[] = {
static const Property spapr_nvdimm_properties[] = {
#ifdef CONFIG_LIBPMEM
DEFINE_PROP_BOOL("pmem-override", SpaprNVDIMMDevice, pmem_override, false),
#endif

2
hw/ppc/spapr_pci.c
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@ -2033,7 +2033,7 @@ static void spapr_phb_reset(DeviceState *qdev)
g_hash_table_remove_all(sphb->msi);
}
static Property spapr_phb_properties[] = {
static const Property spapr_phb_properties[] = {
DEFINE_PROP_UINT32("index", SpaprPhbState, index, -1),
DEFINE_PROP_UINT64("mem_win_size", SpaprPhbState, mem_win_size,
SPAPR_PCI_MEM32_WIN_SIZE),

2
hw/ppc/spapr_rng.c
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@ -130,7 +130,7 @@ static void spapr_rng_realize(DeviceState *dev, Error **errp)
}
}
static Property spapr_rng_properties[] = {
static const Property spapr_rng_properties[] = {
DEFINE_PROP_BOOL("use-kvm", SpaprRngState, use_kvm, false),
DEFINE_PROP_LINK("rng", SpaprRngState, backend, TYPE_RNG_BACKEND,
RngBackend *),

2
hw/ppc/spapr_tpm_proxy.c
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@ -145,7 +145,7 @@ static void spapr_tpm_proxy_unrealize(DeviceState *d)
qemu_unregister_reset(spapr_tpm_proxy_reset, tpm_proxy);
}
static Property spapr_tpm_proxy_properties[] = {
static const Property spapr_tpm_proxy_properties[] = {
DEFINE_PROP_STRING("host-path", SpaprTpmProxy, host_path),
DEFINE_PROP_END_OF_LIST(),
};