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target/sparc: Move gen_fop_DD insns to decodetree

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Move FSQRTd, FxTOd, FdTOx.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-10-10 14:56:49 -07:00
parent 119cb94f69
commit 8aa418b3ef
2 changed files with 30 additions and 23 deletions
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3
target/sparc/insns.decode
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@ -246,6 +246,9 @@ FNEGd 10 ..... 110100 00000 0 0000 0110 ..... @r_r2
FABSs 10 ..... 110100 00000 0 0000 1001 ..... @r_r2 FABSs 10 ..... 110100 00000 0 0000 1001 ..... @r_r2
FABSd 10 ..... 110100 00000 0 0000 1010 ..... @r_r2 FABSd 10 ..... 110100 00000 0 0000 1010 ..... @r_r2
FSQRTs 10 ..... 110100 00000 0 0010 1001 ..... @r_r2 FSQRTs 10 ..... 110100 00000 0 0010 1001 ..... @r_r2
FSQRTd 10 ..... 110100 00000 0 0010 1010 ..... @r_r2
FdTOx 10 ..... 110100 00000 0 1000 0010 ..... @r_r2
FxTOd 10 ..... 110100 00000 0 1000 1000 ..... @r_r2
FiTOs 10 ..... 110100 00000 0 1100 0100 ..... @r_r2 FiTOs 10 ..... 110100 00000 0 1100 0100 ..... @r_r2
FsTOi 10 ..... 110100 00000 0 1101 0001 ..... @r_r2 FsTOi 10 ..... 110100 00000 0 1101 0001 ..... @r_r2

50
target/sparc/translate.c
View File

@ -63,6 +63,7 @@
# define gen_helper_write_softint(E, S) qemu_build_not_reached() # define gen_helper_write_softint(E, S) qemu_build_not_reached()
# define gen_helper_wrpil(E, S) qemu_build_not_reached() # define gen_helper_wrpil(E, S) qemu_build_not_reached()
# define gen_helper_wrpstate(E, S) qemu_build_not_reached() # define gen_helper_wrpstate(E, S) qemu_build_not_reached()
# define gen_helper_fdtox ({ qemu_build_not_reached(); NULL; })
# define gen_helper_fexpand ({ qemu_build_not_reached(); NULL; }) # define gen_helper_fexpand ({ qemu_build_not_reached(); NULL; })
# define gen_helper_fmul8sux16 ({ qemu_build_not_reached(); NULL; }) # define gen_helper_fmul8sux16 ({ qemu_build_not_reached(); NULL; })
# define gen_helper_fmul8ulx16 ({ qemu_build_not_reached(); NULL; }) # define gen_helper_fmul8ulx16 ({ qemu_build_not_reached(); NULL; })
@ -72,6 +73,7 @@
# define gen_helper_fmuld8sux16 ({ qemu_build_not_reached(); NULL; }) # define gen_helper_fmuld8sux16 ({ qemu_build_not_reached(); NULL; })
# define gen_helper_fmuld8ulx16 ({ qemu_build_not_reached(); NULL; }) # define gen_helper_fmuld8ulx16 ({ qemu_build_not_reached(); NULL; })
# define gen_helper_fpmerge ({ qemu_build_not_reached(); NULL; }) # define gen_helper_fpmerge ({ qemu_build_not_reached(); NULL; })
# define gen_helper_fxtod ({ qemu_build_not_reached(); NULL; })
# define gen_helper_pdist ({ qemu_build_not_reached(); NULL; }) # define gen_helper_pdist ({ qemu_build_not_reached(); NULL; })
# define FSR_LDXFSR_MASK 0 # define FSR_LDXFSR_MASK 0
# define FSR_LDXFSR_OLDMASK 0 # define FSR_LDXFSR_OLDMASK 0
@ -1669,20 +1671,6 @@ static void gen_fop_FFF(DisasContext *dc, int rd, int rs1, int rs2,
gen_store_fpr_F(dc, rd, dst); gen_store_fpr_F(dc, rd, dst);
} }
static void gen_fop_DD(DisasContext *dc, int rd, int rs,
void (*gen)(TCGv_i64, TCGv_ptr, TCGv_i64))
{
TCGv_i64 dst, src;
src = gen_load_fpr_D(dc, rs);
dst = gen_dest_fpr_D(dc, rd);
gen(dst, tcg_env, src);
gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env);
gen_store_fpr_D(dc, rd, dst);
}
static void gen_fop_DDD(DisasContext *dc, int rd, int rs1, int rs2, static void gen_fop_DDD(DisasContext *dc, int rd, int rs1, int rs2,
void (*gen)(TCGv_i64, TCGv_ptr, TCGv_i64, TCGv_i64)) void (*gen)(TCGv_i64, TCGv_ptr, TCGv_i64, TCGv_i64))
{ {
@ -4835,6 +4823,28 @@ TRANS(FABSd, 64, do_dd, a, gen_op_fabsd)
TRANS(FSRCd, VIS1, do_dd, a, tcg_gen_mov_i64) TRANS(FSRCd, VIS1, do_dd, a, tcg_gen_mov_i64)
TRANS(FNOTd, VIS1, do_dd, a, tcg_gen_not_i64) TRANS(FNOTd, VIS1, do_dd, a, tcg_gen_not_i64)
static bool do_env_dd(DisasContext *dc, arg_r_r *a,
void (*func)(TCGv_i64, TCGv_env, TCGv_i64))
{
TCGv_i64 dst, src;
if (gen_trap_ifnofpu(dc)) {
return true;
}
gen_op_clear_ieee_excp_and_FTT();
dst = gen_dest_fpr_D(dc, a->rd);
src = gen_load_fpr_D(dc, a->rs);
func(dst, tcg_env, src);
gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env);
gen_store_fpr_D(dc, a->rd, dst);
return advance_pc(dc);
}
TRANS(FSQRTd, ALL, do_env_dd, a, gen_helper_fsqrtd)
TRANS(FxTOd, 64, do_env_dd, a, gen_helper_fxtod)
TRANS(FdTOx, 64, do_env_dd, a, gen_helper_fdtox)
static bool do_fff(DisasContext *dc, arg_r_r_r *a, static bool do_fff(DisasContext *dc, arg_r_r_r *a,
void (*func)(TCGv_i32, TCGv_i32, TCGv_i32)) void (*func)(TCGv_i32, TCGv_i32, TCGv_i32))
{ {
@ -4977,10 +4987,10 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
case 0x29: /* fsqrts */ case 0x29: /* fsqrts */
case 0xc4: /* fitos */ case 0xc4: /* fitos */
case 0xd1: /* fstoi */ case 0xd1: /* fstoi */
g_assert_not_reached(); /* in decodetree */
case 0x2a: /* fsqrtd */ case 0x2a: /* fsqrtd */
gen_fop_DD(dc, rd, rs2, gen_helper_fsqrtd); case 0x82: /* V9 fdtox */
break; case 0x88: /* V9 fxtod */
g_assert_not_reached(); /* in decodetree */
case 0x2b: /* fsqrtq */ case 0x2b: /* fsqrtq */
CHECK_FPU_FEATURE(dc, FLOAT128); CHECK_FPU_FEATURE(dc, FLOAT128);
gen_fop_QQ(dc, rd, rs2, gen_helper_fsqrtq); gen_fop_QQ(dc, rd, rs2, gen_helper_fsqrtq);
@ -5085,9 +5095,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
case 0x81: /* V9 fstox */ case 0x81: /* V9 fstox */
gen_fop_DF(dc, rd, rs2, gen_helper_fstox); gen_fop_DF(dc, rd, rs2, gen_helper_fstox);
break; break;
case 0x82: /* V9 fdtox */
gen_fop_DD(dc, rd, rs2, gen_helper_fdtox);
break;
case 0x83: /* V9 fqtox */ case 0x83: /* V9 fqtox */
CHECK_FPU_FEATURE(dc, FLOAT128); CHECK_FPU_FEATURE(dc, FLOAT128);
gen_fop_DQ(dc, rd, rs2, gen_helper_fqtox); gen_fop_DQ(dc, rd, rs2, gen_helper_fqtox);
@ -5095,9 +5102,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
case 0x84: /* V9 fxtos */ case 0x84: /* V9 fxtos */
gen_fop_FD(dc, rd, rs2, gen_helper_fxtos); gen_fop_FD(dc, rd, rs2, gen_helper_fxtos);
break; break;
case 0x88: /* V9 fxtod */
gen_fop_DD(dc, rd, rs2, gen_helper_fxtod);
break;
case 0x8c: /* V9 fxtoq */ case 0x8c: /* V9 fxtoq */
CHECK_FPU_FEATURE(dc, FLOAT128); CHECK_FPU_FEATURE(dc, FLOAT128);
gen_ne_fop_QD(dc, rd, rs2, gen_helper_fxtoq); gen_ne_fop_QD(dc, rd, rs2, gen_helper_fxtoq);