meson: Disallow 64-bit on 32-bit emulation
-----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmenwp8dHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV92iQgAm6uXZQPlnRw6PkPg getS21AcsrypCdrik2YhCrFNtVoo5cLn6aJAWl6c10zJZO+Ap4FKRAKbGUaQ7Awv x+NRvo5Q/W+E+e8BeTvvuhQ6DaGkH5eMIgQC31w3s0Fh4siAEpNCXxb3WFyTEHiR qVh/jOKF6lHTGFke9BVbEv3iNVi+Hg7GXyVi3/HqWj3VTe0WzdB1eJDKF2Ja5dAJ H9UVOwxdxB9ztjjx1Y4SSfyftcq/myz9xx4yGPotW+85gk33HEMLMDVksLVLuyJN rKzcjrU8a64i+B3xP9f3t6Nwud1LoYm6bI2Wf80ScUK8qJ0XidNT96FkO6Phj/mH lW/nWA== =zdKE -----END PGP SIGNATURE----- Merge tag 'pull-tcg-20250208' of https://gitlab.com/rth7680/qemu into staging meson: Disallow 64-bit on 32-bit emulation # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmenwp8dHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV92iQgAm6uXZQPlnRw6PkPg # getS21AcsrypCdrik2YhCrFNtVoo5cLn6aJAWl6c10zJZO+Ap4FKRAKbGUaQ7Awv # x+NRvo5Q/W+E+e8BeTvvuhQ6DaGkH5eMIgQC31w3s0Fh4siAEpNCXxb3WFyTEHiR # qVh/jOKF6lHTGFke9BVbEv3iNVi+Hg7GXyVi3/HqWj3VTe0WzdB1eJDKF2Ja5dAJ # H9UVOwxdxB9ztjjx1Y4SSfyftcq/myz9xx4yGPotW+85gk33HEMLMDVksLVLuyJN # rKzcjrU8a64i+B3xP9f3t6Nwud1LoYm6bI2Wf80ScUK8qJ0XidNT96FkO6Phj/mH # lW/nWA== # =zdKE # -----END PGP SIGNATURE----- # gpg: Signature made Sat 08 Feb 2025 15:46:23 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20250208' of https://gitlab.com/rth7680/qemu: meson: Deprecate 32-bit host support meson: Disallow 64-bit on 32-bit emulation target/*: Remove TARGET_LONG_BITS from cpu-param.h configure: Define TARGET_LONG_BITS in configs/targets/*.mak gitlab-ci: Replace aarch64 with arm in cross-i686-tci build meson: Disallow 64-bit on 32-bit HVF/NVMM/WHPX emulation meson: Disallow 64-bit on 32-bit Xen emulation meson: Disallow 64-bit on 32-bit KVM emulation meson: Drop tcg as a module Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
commit
8527126957
@ -61,7 +61,7 @@ cross-i686-tci:
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variables:
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IMAGE: debian-i686-cross
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ACCEL: tcg-interpreter
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EXTRA_CONFIGURE_OPTS: --target-list=i386-softmmu,i386-linux-user,aarch64-softmmu,aarch64-linux-user,ppc-softmmu,ppc-linux-user --disable-plugins --disable-kvm
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EXTRA_CONFIGURE_OPTS: --target-list=i386-softmmu,i386-linux-user,arm-softmmu,arm-linux-user,ppc-softmmu,ppc-linux-user --disable-plugins --disable-kvm
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# Force tests to run with reduced parallelism, to see whether this
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# reduces the flakiness of this CI job. The CI
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# environment by default shows us 8 CPUs and so we
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@ -21,16 +21,13 @@ specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_specific_ss)
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specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
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'cputlb.c',
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'watchpoint.c',
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'tcg-accel-ops.c',
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'tcg-accel-ops-mttcg.c',
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'tcg-accel-ops-icount.c',
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'tcg-accel-ops-rr.c',
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))
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system_ss.add(when: ['CONFIG_TCG'], if_true: files(
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'icount-common.c',
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'monitor.c',
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))
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tcg_module_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
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'tcg-accel-ops.c',
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'tcg-accel-ops-mttcg.c',
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'tcg-accel-ops-icount.c',
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'tcg-accel-ops-rr.c',
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))
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@ -1,3 +1,4 @@
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TARGET_ARCH=aarch64
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TARGET_BASE_ARCH=arm
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TARGET_XML_FILES= gdb-xml/aarch64-core.xml gdb-xml/aarch64-fpu.xml gdb-xml/aarch64-pauth.xml
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TARGET_LONG_BITS=64
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@ -6,3 +6,4 @@ CONFIG_SEMIHOSTING=y
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CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
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TARGET_SYSTBL_ABI=common,64,renameat,rlimit,memfd_secret
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TARGET_SYSTBL=syscall_64.tbl
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TARGET_LONG_BITS=64
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@ -5,3 +5,4 @@ TARGET_KVM_HAVE_GUEST_DEBUG=y
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TARGET_XML_FILES= gdb-xml/aarch64-core.xml gdb-xml/aarch64-fpu.xml gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml gdb-xml/aarch64-pauth.xml
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# needed by boot.c
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TARGET_NEED_FDT=y
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TARGET_LONG_BITS=64
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@ -7,3 +7,4 @@ CONFIG_SEMIHOSTING=y
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CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
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TARGET_SYSTBL_ABI=common,64,renameat,rlimit,memfd_secret
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TARGET_SYSTBL=syscall_64.tbl
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TARGET_LONG_BITS=64
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@ -1,3 +1,4 @@
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TARGET_ARCH=alpha
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TARGET_SYSTBL_ABI=common
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TARGET_SYSTBL=syscall.tbl
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TARGET_LONG_BITS=64
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@ -1,2 +1,3 @@
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TARGET_ARCH=alpha
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TARGET_SUPPORTS_MTTCG=y
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TARGET_LONG_BITS=64
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@ -1,2 +1,3 @@
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TARGET_ARCH=arm
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TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml
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TARGET_LONG_BITS=32
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@ -5,3 +5,4 @@ TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml
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TARGET_HAS_BFLT=y
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CONFIG_SEMIHOSTING=y
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CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
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TARGET_LONG_BITS=32
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@ -3,3 +3,4 @@ TARGET_SUPPORTS_MTTCG=y
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TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml
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# needed by boot.c
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TARGET_NEED_FDT=y
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TARGET_LONG_BITS=32
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@ -6,3 +6,4 @@ TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml
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TARGET_HAS_BFLT=y
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CONFIG_SEMIHOSTING=y
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CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
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TARGET_LONG_BITS=32
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@ -1,2 +1,3 @@
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TARGET_ARCH=avr
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TARGET_XML_FILES= gdb-xml/avr-cpu.xml
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TARGET_LONG_BITS=32
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@ -2,3 +2,4 @@ TARGET_ARCH=hexagon
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TARGET_XML_FILES=gdb-xml/hexagon-core.xml gdb-xml/hexagon-hvx.xml
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TARGET_SYSTBL=syscall.tbl
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TARGET_SYSTBL_ABI=common,32,hexagon,time32,stat64,rlimit,renameat
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TARGET_LONG_BITS=32
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@ -3,3 +3,5 @@ TARGET_ABI32=y
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TARGET_SYSTBL_ABI=common,32
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TARGET_SYSTBL=syscall.tbl
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TARGET_BIG_ENDIAN=y
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# Compromise to ease maintenance vs system mode
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TARGET_LONG_BITS=64
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@ -1,3 +1,4 @@
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TARGET_ARCH=hppa
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TARGET_BIG_ENDIAN=y
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TARGET_SUPPORTS_MTTCG=y
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TARGET_LONG_BITS=64
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@ -1,2 +1,3 @@
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TARGET_ARCH=i386
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TARGET_XML_FILES= gdb-xml/i386-32bit.xml
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TARGET_LONG_BITS=32
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@ -2,3 +2,4 @@ TARGET_ARCH=i386
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TARGET_SYSTBL_ABI=i386
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TARGET_SYSTBL=syscall_32.tbl
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TARGET_XML_FILES= gdb-xml/i386-32bit.xml gdb-xml/i386-32bit-linux.xml
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TARGET_LONG_BITS=32
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@ -3,3 +3,4 @@ TARGET_SUPPORTS_MTTCG=y
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TARGET_KVM_HAVE_GUEST_DEBUG=y
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TARGET_KVM_HAVE_RESET_PARKED_VCPU=y
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TARGET_XML_FILES= gdb-xml/i386-32bit.xml
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TARGET_LONG_BITS=32
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@ -4,3 +4,4 @@ TARGET_BASE_ARCH=loongarch
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TARGET_XML_FILES=gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml gdb-xml/loongarch-lsx.xml gdb-xml/loongarch-lasx.xml
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TARGET_SYSTBL=syscall.tbl
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TARGET_SYSTBL_ABI=common,64
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TARGET_LONG_BITS=64
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@ -5,3 +5,4 @@ TARGET_SUPPORTS_MTTCG=y
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TARGET_XML_FILES= gdb-xml/loongarch-base32.xml gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml gdb-xml/loongarch-lsx.xml gdb-xml/loongarch-lasx.xml
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# all boards require libfdt
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TARGET_NEED_FDT=y
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TARGET_LONG_BITS=64
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@ -4,3 +4,4 @@ TARGET_SYSTBL=syscall.tbl
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TARGET_BIG_ENDIAN=y
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TARGET_XML_FILES= gdb-xml/cf-core.xml gdb-xml/cf-fp.xml gdb-xml/m68k-core.xml gdb-xml/m68k-fp.xml
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TARGET_HAS_BFLT=y
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TARGET_LONG_BITS=32
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@ -1,3 +1,4 @@
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TARGET_ARCH=m68k
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TARGET_BIG_ENDIAN=y
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TARGET_XML_FILES= gdb-xml/cf-core.xml gdb-xml/cf-fp.xml gdb-xml/m68k-core.xml gdb-xml/m68k-fp.xml
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TARGET_LONG_BITS=32
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|
@ -4,3 +4,4 @@ TARGET_SYSTBL=syscall.tbl
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TARGET_BIG_ENDIAN=y
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TARGET_HAS_BFLT=y
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TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml
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TARGET_LONG_BITS=32
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@ -4,3 +4,6 @@ TARGET_SUPPORTS_MTTCG=y
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# needed by boot.c
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TARGET_NEED_FDT=y
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TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml
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# System mode can address up to 64 bits via lea/sea instructions.
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# TODO: These bypass the mmu, so we could emulate these differently.
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TARGET_LONG_BITS=64
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@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common
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TARGET_SYSTBL=syscall.tbl
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TARGET_HAS_BFLT=y
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TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml
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TARGET_LONG_BITS=32
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@ -3,3 +3,6 @@ TARGET_SUPPORTS_MTTCG=y
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# needed by boot.c
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TARGET_NEED_FDT=y
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TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml
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# System mode can address up to 64 bits via lea/sea instructions.
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# TODO: These bypass the mmu, so we could emulate these differently.
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TARGET_LONG_BITS=64
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@ -3,3 +3,4 @@ TARGET_ABI_MIPSO32=y
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TARGET_SYSTBL_ABI=o32
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TARGET_SYSTBL=syscall_o32.tbl
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TARGET_BIG_ENDIAN=y
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TARGET_LONG_BITS=32
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@ -1,3 +1,4 @@
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TARGET_ARCH=mips
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TARGET_BIG_ENDIAN=y
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TARGET_SUPPORTS_MTTCG=y
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TARGET_LONG_BITS=32
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@ -4,3 +4,4 @@ TARGET_BASE_ARCH=mips
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TARGET_SYSTBL_ABI=n64
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TARGET_SYSTBL=syscall_n64.tbl
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TARGET_BIG_ENDIAN=y
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TARGET_LONG_BITS=64
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@ -1,3 +1,4 @@
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TARGET_ARCH=mips64
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TARGET_BASE_ARCH=mips
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TARGET_BIG_ENDIAN=y
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TARGET_LONG_BITS=64
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@ -3,3 +3,4 @@ TARGET_ABI_MIPSN64=y
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TARGET_BASE_ARCH=mips
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TARGET_SYSTBL_ABI=n64
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TARGET_SYSTBL=syscall_n64.tbl
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TARGET_LONG_BITS=64
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@ -1,2 +1,3 @@
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TARGET_ARCH=mips64
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TARGET_BASE_ARCH=mips
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TARGET_LONG_BITS=64
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@ -2,3 +2,4 @@ TARGET_ARCH=mips
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TARGET_ABI_MIPSO32=y
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TARGET_SYSTBL_ABI=o32
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TARGET_SYSTBL=syscall_o32.tbl
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TARGET_LONG_BITS=32
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|
@ -1,2 +1,3 @@
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TARGET_ARCH=mips
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TARGET_SUPPORTS_MTTCG=y
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TARGET_LONG_BITS=32
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|
@ -5,3 +5,4 @@ TARGET_BASE_ARCH=mips
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TARGET_SYSTBL_ABI=n32
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TARGET_SYSTBL=syscall_n32.tbl
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TARGET_BIG_ENDIAN=y
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TARGET_LONG_BITS=64
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|
@ -4,3 +4,4 @@ TARGET_ABI32=y
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TARGET_BASE_ARCH=mips
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TARGET_SYSTBL_ABI=n32
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TARGET_SYSTBL=syscall_n32.tbl
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TARGET_LONG_BITS=64
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|
@ -2,3 +2,4 @@ TARGET_ARCH=openrisc
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TARGET_BIG_ENDIAN=y
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TARGET_SYSTBL_ABI=common,32,or1k,time32,stat64,rlimit,renameat
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TARGET_SYSTBL=syscall.tbl
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TARGET_LONG_BITS=32
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|
@ -3,3 +3,4 @@ TARGET_SUPPORTS_MTTCG=y
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TARGET_BIG_ENDIAN=y
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# needed by boot.c and all boards
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TARGET_NEED_FDT=y
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TARGET_LONG_BITS=32
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|
@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common,nospu,32
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TARGET_SYSTBL=syscall.tbl
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TARGET_BIG_ENDIAN=y
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TARGET_XML_FILES= gdb-xml/power-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.xml
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TARGET_LONG_BITS=32
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|
@ -2,3 +2,4 @@ TARGET_ARCH=ppc
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TARGET_BIG_ENDIAN=y
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TARGET_KVM_HAVE_GUEST_DEBUG=y
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TARGET_XML_FILES= gdb-xml/power-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.xml
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TARGET_LONG_BITS=32
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|
@ -5,3 +5,4 @@ TARGET_SYSTBL_ABI=common,nospu,64
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TARGET_SYSTBL=syscall.tbl
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TARGET_BIG_ENDIAN=y
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TARGET_XML_FILES= gdb-xml/power64-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.xml gdb-xml/power-vsx.xml
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TARGET_LONG_BITS=64
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|
@ -6,3 +6,4 @@ TARGET_KVM_HAVE_GUEST_DEBUG=y
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TARGET_XML_FILES= gdb-xml/power64-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.xml gdb-xml/power-vsx.xml
|
||||
# all boards require libfdt
|
||||
TARGET_NEED_FDT=y
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -4,3 +4,4 @@ TARGET_ABI_DIR=ppc
|
||||
TARGET_SYSTBL_ABI=common,nospu,64
|
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TARGET_SYSTBL=syscall.tbl
|
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TARGET_XML_FILES= gdb-xml/power64-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.xml gdb-xml/power-vsx.xml
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -7,3 +7,4 @@ CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
|
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TARGET_SYSTBL_ABI=32
|
||||
TARGET_SYSTBL_ABI=common,32,riscv,memfd_secret
|
||||
TARGET_SYSTBL=syscall.tbl
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -4,3 +4,4 @@ TARGET_SUPPORTS_MTTCG=y
|
||||
TARGET_XML_FILES= gdb-xml/riscv-32bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-32bit-virtual.xml
|
||||
# needed by boot.c
|
||||
TARGET_NEED_FDT=y
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -2,3 +2,4 @@ TARGET_ARCH=riscv64
|
||||
TARGET_BASE_ARCH=riscv
|
||||
TARGET_ABI_DIR=riscv
|
||||
TARGET_XML_FILES= gdb-xml/riscv-64bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-64bit-virtual.xml
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -7,3 +7,4 @@ CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
|
||||
TARGET_SYSTBL_ABI=64
|
||||
TARGET_SYSTBL_ABI=common,64,riscv,rlimit,memfd_secret
|
||||
TARGET_SYSTBL=syscall.tbl
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -5,3 +5,4 @@ TARGET_KVM_HAVE_GUEST_DEBUG=y
|
||||
TARGET_XML_FILES= gdb-xml/riscv-64bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-64bit-virtual.xml gdb-xml/riscv-32bit-cpu.xml gdb-xml/riscv-32bit-virtual.xml
|
||||
# needed by boot.c
|
||||
TARGET_NEED_FDT=y
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -2,3 +2,4 @@ TARGET_ARCH=rx
|
||||
TARGET_XML_FILES= gdb-xml/rx-core.xml
|
||||
# all boards require libfdt
|
||||
TARGET_NEED_FDT=y
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common,64
|
||||
TARGET_SYSTBL=syscall.tbl
|
||||
TARGET_BIG_ENDIAN=y
|
||||
TARGET_XML_FILES= gdb-xml/s390x-core64.xml gdb-xml/s390-acr.xml gdb-xml/s390-fpr.xml gdb-xml/s390-vx.xml gdb-xml/s390-cr.xml gdb-xml/s390-virt.xml gdb-xml/s390-virt-kvm.xml gdb-xml/s390-gs.xml
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -3,3 +3,4 @@ TARGET_BIG_ENDIAN=y
|
||||
TARGET_SUPPORTS_MTTCG=y
|
||||
TARGET_KVM_HAVE_GUEST_DEBUG=y
|
||||
TARGET_XML_FILES= gdb-xml/s390x-core64.xml gdb-xml/s390-acr.xml gdb-xml/s390-fpr.xml gdb-xml/s390-vx.xml gdb-xml/s390-cr.xml gdb-xml/s390-virt.xml gdb-xml/s390-virt-kvm.xml gdb-xml/s390-gs.xml
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -2,3 +2,4 @@ TARGET_ARCH=sh4
|
||||
TARGET_SYSTBL_ABI=common
|
||||
TARGET_SYSTBL=syscall.tbl
|
||||
TARGET_HAS_BFLT=y
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -1 +1,2 @@
|
||||
TARGET_ARCH=sh4
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common
|
||||
TARGET_SYSTBL=syscall.tbl
|
||||
TARGET_BIG_ENDIAN=y
|
||||
TARGET_HAS_BFLT=y
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -1,2 +1,3 @@
|
||||
TARGET_ARCH=sh4
|
||||
TARGET_BIG_ENDIAN=y
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -2,3 +2,4 @@ TARGET_ARCH=sparc
|
||||
TARGET_SYSTBL_ABI=common,32
|
||||
TARGET_SYSTBL=syscall.tbl
|
||||
TARGET_BIG_ENDIAN=y
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -1,3 +1,4 @@
|
||||
TARGET_ARCH=sparc
|
||||
TARGET_BIG_ENDIAN=y
|
||||
TARGET_SUPPORTS_MTTCG=y
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -5,3 +5,4 @@ TARGET_ABI_DIR=sparc
|
||||
TARGET_SYSTBL_ABI=common,32
|
||||
TARGET_SYSTBL=syscall.tbl
|
||||
TARGET_BIG_ENDIAN=y
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -4,3 +4,4 @@ TARGET_ABI_DIR=sparc
|
||||
TARGET_SYSTBL_ABI=common,64
|
||||
TARGET_SYSTBL=syscall.tbl
|
||||
TARGET_BIG_ENDIAN=y
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -2,3 +2,4 @@ TARGET_ARCH=sparc64
|
||||
TARGET_BASE_ARCH=sparc
|
||||
TARGET_BIG_ENDIAN=y
|
||||
TARGET_SUPPORTS_MTTCG=y
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -1 +1,2 @@
|
||||
TARGET_ARCH=tricore
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -1,3 +1,4 @@
|
||||
TARGET_ARCH=x86_64
|
||||
TARGET_BASE_ARCH=i386
|
||||
TARGET_XML_FILES= gdb-xml/i386-64bit.xml
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -3,3 +3,4 @@ TARGET_BASE_ARCH=i386
|
||||
TARGET_SYSTBL_ABI=common,64
|
||||
TARGET_SYSTBL=syscall_64.tbl
|
||||
TARGET_XML_FILES= gdb-xml/i386-64bit.xml gdb-xml/i386-64bit-linux.xml
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -4,3 +4,4 @@ TARGET_SUPPORTS_MTTCG=y
|
||||
TARGET_KVM_HAVE_GUEST_DEBUG=y
|
||||
TARGET_KVM_HAVE_RESET_PARKED_VCPU=y
|
||||
TARGET_XML_FILES= gdb-xml/i386-64bit.xml
|
||||
TARGET_LONG_BITS=64
|
||||
|
@ -2,3 +2,4 @@ TARGET_ARCH=xtensa
|
||||
TARGET_SYSTBL_ABI=common
|
||||
TARGET_SYSTBL=syscall.tbl
|
||||
TARGET_HAS_BFLT=y
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -1,2 +1,3 @@
|
||||
TARGET_ARCH=xtensa
|
||||
TARGET_SUPPORTS_MTTCG=y
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common
|
||||
TARGET_SYSTBL=syscall.tbl
|
||||
TARGET_BIG_ENDIAN=y
|
||||
TARGET_HAS_BFLT=y
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -1,3 +1,4 @@
|
||||
TARGET_ARCH=xtensa
|
||||
TARGET_BIG_ENDIAN=y
|
||||
TARGET_SUPPORTS_MTTCG=y
|
||||
TARGET_LONG_BITS=32
|
||||
|
@ -204,6 +204,13 @@ is going to be so much slower it wouldn't make sense for any serious
|
||||
instrumentation. Due to implementation differences there will also be
|
||||
anomalies in things like memory instrumentation.
|
||||
|
||||
32-bit host operating systems (since 10.0)
|
||||
''''''''''''''''''''''''''''''''''''''''''
|
||||
|
||||
Keeping 32-bit host support alive is a substantial burden for the
|
||||
QEMU project. Thus QEMU will in future drop the support for all
|
||||
32-bit host systems.
|
||||
|
||||
System emulator CPUs
|
||||
--------------------
|
||||
|
||||
|
72
meson.build
72
meson.build
@ -277,30 +277,41 @@ else
|
||||
host_arch = cpu
|
||||
endif
|
||||
|
||||
if cpu in ['x86', 'x86_64']
|
||||
if cpu == 'x86'
|
||||
kvm_targets = ['i386-softmmu']
|
||||
elif cpu == 'x86_64'
|
||||
kvm_targets = ['i386-softmmu', 'x86_64-softmmu']
|
||||
elif cpu == 'aarch64'
|
||||
kvm_targets = ['aarch64-softmmu']
|
||||
elif cpu == 's390x'
|
||||
kvm_targets = ['s390x-softmmu']
|
||||
elif cpu in ['ppc', 'ppc64']
|
||||
elif cpu == 'ppc'
|
||||
kvm_targets = ['ppc-softmmu']
|
||||
elif cpu == 'ppc64'
|
||||
kvm_targets = ['ppc-softmmu', 'ppc64-softmmu']
|
||||
elif cpu in ['mips', 'mips64']
|
||||
elif cpu == 'mips'
|
||||
kvm_targets = ['mips-softmmu', 'mipsel-softmmu']
|
||||
elif cpu == 'mips64'
|
||||
kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu', 'mips64el-softmmu']
|
||||
elif cpu in ['riscv32']
|
||||
elif cpu == 'riscv32'
|
||||
kvm_targets = ['riscv32-softmmu']
|
||||
elif cpu in ['riscv64']
|
||||
elif cpu == 'riscv64'
|
||||
kvm_targets = ['riscv64-softmmu']
|
||||
elif cpu in ['loongarch64']
|
||||
elif cpu == 'loongarch64'
|
||||
kvm_targets = ['loongarch64-softmmu']
|
||||
else
|
||||
kvm_targets = []
|
||||
endif
|
||||
accelerator_targets = { 'CONFIG_KVM': kvm_targets }
|
||||
|
||||
if cpu in ['x86', 'x86_64']
|
||||
if cpu == 'x86'
|
||||
xen_targets = ['i386-softmmu']
|
||||
elif cpu == 'x86_64'
|
||||
xen_targets = ['i386-softmmu', 'x86_64-softmmu']
|
||||
elif cpu in ['arm', 'aarch64']
|
||||
elif cpu == 'arm'
|
||||
# i386 emulator provides xenpv machine type for multiple architectures
|
||||
xen_targets = ['i386-softmmu']
|
||||
elif cpu == 'aarch64'
|
||||
# i386 emulator provides xenpv machine type for multiple architectures
|
||||
xen_targets = ['i386-softmmu', 'x86_64-softmmu', 'aarch64-softmmu']
|
||||
else
|
||||
@ -308,13 +319,11 @@ else
|
||||
endif
|
||||
accelerator_targets += { 'CONFIG_XEN': xen_targets }
|
||||
|
||||
if cpu in ['aarch64']
|
||||
if cpu == 'aarch64'
|
||||
accelerator_targets += {
|
||||
'CONFIG_HVF': ['aarch64-softmmu']
|
||||
}
|
||||
endif
|
||||
|
||||
if cpu in ['x86', 'x86_64']
|
||||
elif cpu == 'x86_64'
|
||||
accelerator_targets += {
|
||||
'CONFIG_HVF': ['x86_64-softmmu'],
|
||||
'CONFIG_NVMM': ['i386-softmmu', 'x86_64-softmmu'],
|
||||
@ -322,12 +331,6 @@ if cpu in ['x86', 'x86_64']
|
||||
}
|
||||
endif
|
||||
|
||||
modular_tcg = []
|
||||
# Darwin does not support references to thread-local variables in modules
|
||||
if host_os != 'darwin'
|
||||
modular_tcg = ['i386-softmmu', 'x86_64-softmmu']
|
||||
endif
|
||||
|
||||
##################
|
||||
# Compiler flags #
|
||||
##################
|
||||
@ -3182,6 +3185,9 @@ if host_os == 'windows'
|
||||
endif
|
||||
endif
|
||||
|
||||
# Detect host pointer size for the target configuration loop.
|
||||
host_long_bits = cc.sizeof('void *') * 8
|
||||
|
||||
########################
|
||||
# Target configuration #
|
||||
########################
|
||||
@ -3274,16 +3280,17 @@ foreach target : target_dirs
|
||||
}
|
||||
endif
|
||||
|
||||
config_target += keyval.load('configs/targets' / target + '.mak')
|
||||
|
||||
target_kconfig = []
|
||||
foreach sym: accelerators
|
||||
# Disallow 64-bit on 32-bit emulation and virtualization
|
||||
if host_long_bits < config_target['TARGET_LONG_BITS'].to_int()
|
||||
continue
|
||||
endif
|
||||
if sym == 'CONFIG_TCG' or target in accelerator_targets.get(sym, [])
|
||||
config_target += { sym: 'y' }
|
||||
config_all_accel += { sym: 'y' }
|
||||
if target in modular_tcg
|
||||
config_target += { 'CONFIG_TCG_MODULAR': 'y' }
|
||||
else
|
||||
config_target += { 'CONFIG_TCG_BUILTIN': 'y' }
|
||||
endif
|
||||
target_kconfig += [ sym + '=y' ]
|
||||
endif
|
||||
endforeach
|
||||
@ -3294,9 +3301,6 @@ foreach target : target_dirs
|
||||
error('No accelerator available for target @0@'.format(target))
|
||||
endif
|
||||
|
||||
config_target += keyval.load('configs/targets' / target + '.mak')
|
||||
config_target += { 'TARGET_' + config_target['TARGET_ARCH'].to_upper(): 'y' }
|
||||
|
||||
if 'TARGET_NEED_FDT' in config_target and not fdt.found()
|
||||
if default_targets
|
||||
warning('Disabling ' + target + ' due to missing libfdt')
|
||||
@ -3309,6 +3313,7 @@ foreach target : target_dirs
|
||||
actual_target_dirs += target
|
||||
|
||||
# Add default keys
|
||||
config_target += { 'TARGET_' + config_target['TARGET_ARCH'].to_upper(): 'y' }
|
||||
if 'TARGET_BASE_ARCH' not in config_target
|
||||
config_target += {'TARGET_BASE_ARCH': config_target['TARGET_ARCH']}
|
||||
endif
|
||||
@ -3642,7 +3647,6 @@ util_ss = ss.source_set()
|
||||
|
||||
# accel modules
|
||||
qtest_module_ss = ss.source_set()
|
||||
tcg_module_ss = ss.source_set()
|
||||
|
||||
modules = {}
|
||||
target_modules = {}
|
||||
@ -3803,11 +3807,7 @@ subdir('tests/qtest/libqos')
|
||||
subdir('tests/qtest/fuzz')
|
||||
|
||||
# accel modules
|
||||
tcg_real_module_ss = ss.source_set()
|
||||
tcg_real_module_ss.add_all(when: 'CONFIG_TCG_MODULAR', if_true: tcg_module_ss)
|
||||
specific_ss.add_all(when: 'CONFIG_TCG_BUILTIN', if_true: tcg_module_ss)
|
||||
target_modules += { 'accel' : { 'qtest': qtest_module_ss,
|
||||
'tcg': tcg_real_module_ss }}
|
||||
target_modules += { 'accel' : { 'qtest': qtest_module_ss }}
|
||||
|
||||
##############################################
|
||||
# Internal static_libraries and dependencies #
|
||||
@ -4841,14 +4841,12 @@ if host_arch == 'unknown'
|
||||
message('configure has succeeded and you can continue to build, but')
|
||||
message('QEMU will use a slow interpreter to emulate the target CPU.')
|
||||
endif
|
||||
elif host_arch == 'mips'
|
||||
elif host_long_bits < 64
|
||||
message()
|
||||
warning('DEPRECATED HOST CPU')
|
||||
message()
|
||||
message('Support for CPU host architecture ' + cpu + ' is going to be')
|
||||
message('dropped as soon as the QEMU project stops supporting Debian 12')
|
||||
message('("Bookworm"). Going forward, the QEMU project will not guarantee')
|
||||
message('that QEMU will compile or work on this host CPU.')
|
||||
message('Support for 32-bit CPU host architecture ' + cpu + ' is going')
|
||||
message('to be dropped in a future QEMU release.')
|
||||
endif
|
||||
|
||||
if not supported_oses.contains(host_os)
|
||||
|
@ -8,8 +8,6 @@
|
||||
#ifndef ALPHA_CPU_PARAM_H
|
||||
#define ALPHA_CPU_PARAM_H
|
||||
|
||||
#define TARGET_LONG_BITS 64
|
||||
|
||||
/* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44. */
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 44
|
||||
|
||||
|
@ -9,11 +9,9 @@
|
||||
#define ARM_CPU_PARAM_H
|
||||
|
||||
#ifdef TARGET_AARCH64
|
||||
# define TARGET_LONG_BITS 64
|
||||
# define TARGET_PHYS_ADDR_SPACE_BITS 52
|
||||
# define TARGET_VIRT_ADDR_SPACE_BITS 52
|
||||
#else
|
||||
# define TARGET_LONG_BITS 32
|
||||
# define TARGET_PHYS_ADDR_SPACE_BITS 40
|
||||
# define TARGET_VIRT_ADDR_SPACE_BITS 32
|
||||
#endif
|
||||
|
@ -21,7 +21,6 @@
|
||||
#ifndef AVR_CPU_PARAM_H
|
||||
#define AVR_CPU_PARAM_H
|
||||
|
||||
#define TARGET_LONG_BITS 32
|
||||
/*
|
||||
* TARGET_PAGE_BITS cannot be more than 8 bits because
|
||||
* 1. all IO registers occupy [0x0000 .. 0x00ff] address range, and they
|
||||
|
@ -19,7 +19,6 @@
|
||||
#define HEXAGON_CPU_PARAM_H
|
||||
|
||||
#define TARGET_PAGE_BITS 16 /* 64K pages */
|
||||
#define TARGET_LONG_BITS 32
|
||||
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 36
|
||||
#define TARGET_VIRT_ADDR_SPACE_BITS 32
|
||||
|
@ -8,8 +8,6 @@
|
||||
#ifndef HPPA_CPU_PARAM_H
|
||||
#define HPPA_CPU_PARAM_H
|
||||
|
||||
#define TARGET_LONG_BITS 64
|
||||
|
||||
#if defined(CONFIG_USER_ONLY) && defined(TARGET_ABI32)
|
||||
# define TARGET_PHYS_ADDR_SPACE_BITS 32
|
||||
# define TARGET_VIRT_ADDR_SPACE_BITS 32
|
||||
|
@ -9,7 +9,6 @@
|
||||
#define I386_CPU_PARAM_H
|
||||
|
||||
#ifdef TARGET_X86_64
|
||||
# define TARGET_LONG_BITS 64
|
||||
# define TARGET_PHYS_ADDR_SPACE_BITS 52
|
||||
/*
|
||||
* ??? This is really 48 bits, sign-extended, but the only thing
|
||||
@ -18,7 +17,6 @@
|
||||
*/
|
||||
# define TARGET_VIRT_ADDR_SPACE_BITS 47
|
||||
#else
|
||||
# define TARGET_LONG_BITS 32
|
||||
# define TARGET_PHYS_ADDR_SPACE_BITS 36
|
||||
# define TARGET_VIRT_ADDR_SPACE_BITS 32
|
||||
#endif
|
||||
|
@ -8,7 +8,6 @@
|
||||
#ifndef LOONGARCH_CPU_PARAM_H
|
||||
#define LOONGARCH_CPU_PARAM_H
|
||||
|
||||
#define TARGET_LONG_BITS 64
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 48
|
||||
#define TARGET_VIRT_ADDR_SPACE_BITS 48
|
||||
|
||||
|
@ -8,7 +8,6 @@
|
||||
#ifndef M68K_CPU_PARAM_H
|
||||
#define M68K_CPU_PARAM_H
|
||||
|
||||
#define TARGET_LONG_BITS 32
|
||||
/*
|
||||
* Coldfire Linux uses 8k pages
|
||||
* and m68k linux uses 4k pages
|
||||
|
@ -17,11 +17,9 @@
|
||||
* of address space.
|
||||
*/
|
||||
#ifdef CONFIG_USER_ONLY
|
||||
#define TARGET_LONG_BITS 32
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 32
|
||||
#define TARGET_VIRT_ADDR_SPACE_BITS 32
|
||||
#else
|
||||
#define TARGET_LONG_BITS 64
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 64
|
||||
#define TARGET_VIRT_ADDR_SPACE_BITS 64
|
||||
#endif
|
||||
|
@ -7,11 +7,6 @@
|
||||
#ifndef MIPS_CPU_PARAM_H
|
||||
#define MIPS_CPU_PARAM_H
|
||||
|
||||
#ifdef TARGET_MIPS64
|
||||
# define TARGET_LONG_BITS 64
|
||||
#else
|
||||
# define TARGET_LONG_BITS 32
|
||||
#endif
|
||||
#ifdef TARGET_ABI_MIPSN64
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 48
|
||||
#define TARGET_VIRT_ADDR_SPACE_BITS 48
|
||||
|
@ -8,7 +8,6 @@
|
||||
#ifndef OPENRISC_CPU_PARAM_H
|
||||
#define OPENRISC_CPU_PARAM_H
|
||||
|
||||
#define TARGET_LONG_BITS 32
|
||||
#define TARGET_PAGE_BITS 13
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 32
|
||||
#define TARGET_VIRT_ADDR_SPACE_BITS 32
|
||||
|
@ -9,7 +9,6 @@
|
||||
#define PPC_CPU_PARAM_H
|
||||
|
||||
#ifdef TARGET_PPC64
|
||||
# define TARGET_LONG_BITS 64
|
||||
/*
|
||||
* Note that the official physical address space bits is 62-M where M
|
||||
* is implementation dependent. I've not looked up M for the set of
|
||||
@ -27,7 +26,6 @@
|
||||
# define TARGET_VIRT_ADDR_SPACE_BITS 64
|
||||
# endif
|
||||
#else
|
||||
# define TARGET_LONG_BITS 32
|
||||
# define TARGET_PHYS_ADDR_SPACE_BITS 36
|
||||
# define TARGET_VIRT_ADDR_SPACE_BITS 32
|
||||
#endif
|
||||
|
@ -9,11 +9,9 @@
|
||||
#define RISCV_CPU_PARAM_H
|
||||
|
||||
#if defined(TARGET_RISCV64)
|
||||
# define TARGET_LONG_BITS 64
|
||||
# define TARGET_PHYS_ADDR_SPACE_BITS 56 /* 44-bit PPN */
|
||||
# define TARGET_VIRT_ADDR_SPACE_BITS 48 /* sv48 */
|
||||
#elif defined(TARGET_RISCV32)
|
||||
# define TARGET_LONG_BITS 32
|
||||
# define TARGET_PHYS_ADDR_SPACE_BITS 34 /* 22-bit PPN */
|
||||
# define TARGET_VIRT_ADDR_SPACE_BITS 32 /* sv32 */
|
||||
#endif
|
||||
|
@ -19,7 +19,6 @@
|
||||
#ifndef RX_CPU_PARAM_H
|
||||
#define RX_CPU_PARAM_H
|
||||
|
||||
#define TARGET_LONG_BITS 32
|
||||
#define TARGET_PAGE_BITS 12
|
||||
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 32
|
||||
|
@ -8,7 +8,6 @@
|
||||
#ifndef S390_CPU_PARAM_H
|
||||
#define S390_CPU_PARAM_H
|
||||
|
||||
#define TARGET_LONG_BITS 64
|
||||
#define TARGET_PAGE_BITS 12
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 64
|
||||
#define TARGET_VIRT_ADDR_SPACE_BITS 64
|
||||
|
@ -8,7 +8,6 @@
|
||||
#ifndef SH4_CPU_PARAM_H
|
||||
#define SH4_CPU_PARAM_H
|
||||
|
||||
#define TARGET_LONG_BITS 32
|
||||
#define TARGET_PAGE_BITS 12 /* 4k */
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 32
|
||||
#ifdef CONFIG_USER_ONLY
|
||||
|
@ -8,7 +8,6 @@
|
||||
#define SPARC_CPU_PARAM_H
|
||||
|
||||
#ifdef TARGET_SPARC64
|
||||
# define TARGET_LONG_BITS 64
|
||||
# define TARGET_PAGE_BITS 13 /* 8k */
|
||||
# define TARGET_PHYS_ADDR_SPACE_BITS 41
|
||||
# ifdef TARGET_ABI32
|
||||
@ -17,7 +16,6 @@
|
||||
# define TARGET_VIRT_ADDR_SPACE_BITS 44
|
||||
# endif
|
||||
#else
|
||||
# define TARGET_LONG_BITS 32
|
||||
# define TARGET_PAGE_BITS 12 /* 4k */
|
||||
# define TARGET_PHYS_ADDR_SPACE_BITS 36
|
||||
# define TARGET_VIRT_ADDR_SPACE_BITS 32
|
||||
|
@ -8,7 +8,6 @@
|
||||
#ifndef TRICORE_CPU_PARAM_H
|
||||
#define TRICORE_CPU_PARAM_H
|
||||
|
||||
#define TARGET_LONG_BITS 32
|
||||
#define TARGET_PAGE_BITS 14
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 32
|
||||
#define TARGET_VIRT_ADDR_SPACE_BITS 32
|
||||
|
@ -8,7 +8,6 @@
|
||||
#ifndef XTENSA_CPU_PARAM_H
|
||||
#define XTENSA_CPU_PARAM_H
|
||||
|
||||
#define TARGET_LONG_BITS 32
|
||||
#define TARGET_PAGE_BITS 12
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 32
|
||||
#ifdef CONFIG_USER_ONLY
|
||||
|
Loading…
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Reference in New Issue
Block a user