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target/tricore: Use tcg_op_supported

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Do not reference TCG_TARGET_HAS_* directly.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2024-12-24 17:15:28 -08:00
parent 3a4fb57013
commit 80a3a9423a
1 changed files with 2 additions and 2 deletions
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target/tricore/translate.c
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@ -3980,7 +3980,7 @@ static void decode_bit_andacc(DisasContext *ctx)
pos1, pos2, &tcg_gen_andc_tl, &tcg_gen_and_tl); pos1, pos2, &tcg_gen_andc_tl, &tcg_gen_and_tl);
break; break;
case OPC2_32_BIT_AND_NOR_T: case OPC2_32_BIT_AND_NOR_T:
if (TCG_TARGET_HAS_andc_i32) { if (tcg_op_supported(INDEX_op_andc_i32, TCG_TYPE_I32, 0)) {
gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],
pos1, pos2, &tcg_gen_or_tl, &tcg_gen_andc_tl); pos1, pos2, &tcg_gen_or_tl, &tcg_gen_andc_tl);
} else { } else {
@ -4113,7 +4113,7 @@ static void decode_bit_orand(DisasContext *ctx)
pos1, pos2, &tcg_gen_andc_tl, &tcg_gen_or_tl); pos1, pos2, &tcg_gen_andc_tl, &tcg_gen_or_tl);
break; break;
case OPC2_32_BIT_OR_NOR_T: case OPC2_32_BIT_OR_NOR_T:
if (TCG_TARGET_HAS_orc_i32) { if (tcg_op_supported(INDEX_op_orc_i32, TCG_TYPE_I32, 0)) {
gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],
pos1, pos2, &tcg_gen_or_tl, &tcg_gen_orc_tl); pos1, pos2, &tcg_gen_or_tl, &tcg_gen_orc_tl);
} else { } else {