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use inline function

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@263 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2003-06-24 13:28:48 +00:00
parent 66e85a21c7
commit 7d83131cc5
1 changed files with 11 additions and 1 deletions
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12
translate-arm.c
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@ -655,7 +655,7 @@ static void disas_arm_insn(DisasContext *s)
/* generate intermediate code in gen_opc_buf and gen_opparam_buf for /* generate intermediate code in gen_opc_buf and gen_opparam_buf for
basic block 'tb'. If search_pc is TRUE, also generate PC basic block 'tb'. If search_pc is TRUE, also generate PC
information for each intermediate instruction. */ information for each intermediate instruction. */
int gen_intermediate_code(TranslationBlock *tb, int search_pc) static inline int gen_intermediate_code_internal(TranslationBlock *tb, int search_pc)
{ {
DisasContext dc1, *dc = &dc1; DisasContext dc1, *dc = &dc1;
uint16_t *gen_opc_end; uint16_t *gen_opc_end;
@ -717,6 +717,16 @@ int gen_intermediate_code(TranslationBlock *tb, int search_pc)
return 0; return 0;
} }
int gen_intermediate_code(TranslationBlock *tb)
{
return gen_intermediate_code_internal(tb, 0);
}
int gen_intermediate_code_pc(TranslationBlock *tb)
{
return gen_intermediate_code_internal(tb, 1);
}
CPUARMState *cpu_arm_init(void) CPUARMState *cpu_arm_init(void)
{ {
CPUARMState *env; CPUARMState *env;